test/CodeGen/AArch64/GlobalISel/select-gv-with-offset.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -code-model=large -run-pass=instruction-select -verify-machineinstrs -O0 %s -o - | FileCheck %s --check-prefix=LARGE
# RUN: llc -mtriple=aarch64 -code-model=small -run-pass=instruction-select -verify-machineinstrs -O0 %s -o - | FileCheck %s --check-prefix=SMALL
# RUN: llc -mtriple=aarch64 -code-model=tiny -run-pass=instruction-select -verify-machineinstrs -O0 %s -o - | FileCheck %s --check-prefix=TINY

--- |
   @g = external hidden global i32
   define void @select_gv_with_offset() { ret void }
...
---
name:            select_gv_with_offset
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x0
    ; LARGE-LABEL: name: select_gv_with_offset
    ; LARGE: liveins: $x0
    ; LARGE: [[MOVZXi:%[0-9]+]]:gpr64 = MOVZXi target-flags(aarch64-g0, aarch64-nc) @g + 1, 0
    ; LARGE: [[MOVKXi:%[0-9]+]]:gpr64 = MOVKXi [[MOVZXi]], target-flags(aarch64-g1, aarch64-nc) @g + 1, 16
    ; LARGE: [[MOVKXi1:%[0-9]+]]:gpr64 = MOVKXi [[MOVKXi]], target-flags(aarch64-g2, aarch64-nc) @g + 1, 32
    ; LARGE: %g:gpr64 = MOVKXi [[MOVKXi1]], target-flags(aarch64-g3) @g + 1, 48
    ; LARGE: $x0 = COPY %g
    ; LARGE: RET_ReallyLR implicit $x0
    ; SMALL-LABEL: name: select_gv_with_offset
    ; SMALL: liveins: $x0
    ; SMALL: %g:gpr64 = MOVaddr target-flags(aarch64-page) @g + 1, target-flags(aarch64-pageoff, aarch64-nc) @g + 1
    ; SMALL: $x0 = COPY %g
    ; SMALL: RET_ReallyLR implicit $x0
    ; TINY-LABEL: name: select_gv_with_offset
    ; TINY: liveins: $x0
    ; TINY: %g:gpr64 = ADR @g + 1
    ; TINY: $x0 = COPY %g
    ; TINY: RET_ReallyLR implicit $x0
    %g:gpr(p0) = G_GLOBAL_VALUE @g + 1
    $x0 = COPY %g(p0)
    RET_ReallyLR implicit $x0