test/CodeGen/AArch64/GlobalISel/select-ctpop.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-unknown-unknown -verify-machineinstrs -run-pass=instruction-select %s -o - | FileCheck %s

...
---
name:            CNTv8i8
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $d0

    ; CHECK-LABEL: name: CNTv8i8
    ; CHECK: liveins: $d0
    ; CHECK: %copy:fpr64 = COPY $d0
    ; CHECK: %ctpop:fpr64 = CNTv8i8 %copy
    ; CHECK: $d0 = COPY %ctpop
    ; CHECK: RET_ReallyLR implicit $d0
    %copy:fpr(<8 x s8>) = COPY $d0
    %ctpop:fpr(<8 x s8>) = G_CTPOP %copy(<8 x s8>)
    $d0 = COPY %ctpop(<8 x s8>)
    RET_ReallyLR implicit $d0

...
---
name:            CNTv16i8
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0

    ; CHECK-LABEL: name: CNTv16i8
    ; CHECK: liveins: $q0
    ; CHECK: %copy:fpr128 = COPY $q0
    ; CHECK: %ctpop:fpr128 = CNTv16i8 %copy
    ; CHECK: $q0 = COPY %ctpop
    ; CHECK: RET_ReallyLR implicit $q0
    %copy:fpr(<16 x s8>) = COPY $q0
    %ctpop:fpr(<16 x s8>) = G_CTPOP %copy(<16 x s8>)
    $q0 = COPY %ctpop(<16 x s8>)
    RET_ReallyLR implicit $q0

...