test/CodeGen/AArch64/GlobalISel/legalize-lrint.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -verify-machineinstrs -mtriple aarch64-unknown-unknown -run-pass=legalizer %s -o - | FileCheck %s
---
name:            testmsws
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$s0' }
body:             |
  bb.1:
    liveins: $s0

    ; CHECK-LABEL: name: testmsws
    ; CHECK: liveins: $s0
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
    ; CHECK: [[INTRINSIC_LRINT:%[0-9]+]]:_(s64) = G_INTRINSIC_LRINT [[COPY]](s32)
    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[INTRINSIC_LRINT]](s64)
    ; CHECK: $w0 = COPY [[TRUNC]](s32)
    ; CHECK: RET_ReallyLR implicit $w0
    %0:_(s32) = COPY $s0
    %1:_(s64) = G_INTRINSIC_LRINT %0(s32)
    %2:_(s32) = G_TRUNC %1(s64)
    $w0 = COPY %2(s32)
    RET_ReallyLR implicit $w0

...
---
name:            testmsxs
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$s0' }
body:             |
  bb.1:
    liveins: $s0

    ; CHECK-LABEL: name: testmsxs
    ; CHECK: liveins: $s0
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
    ; CHECK: [[INTRINSIC_LRINT:%[0-9]+]]:_(s64) = G_INTRINSIC_LRINT [[COPY]](s32)
    ; CHECK: $x0 = COPY [[INTRINSIC_LRINT]](s64)
    ; CHECK: RET_ReallyLR implicit $x0
    %0:_(s32) = COPY $s0
    %1:_(s64) = G_INTRINSIC_LRINT %0(s32)
    $x0 = COPY %1(s64)
    RET_ReallyLR implicit $x0

...
---
name:            testmswd
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$d0' }
body:             |
  bb.1:
    liveins: $d0

    ; CHECK-LABEL: name: testmswd
    ; CHECK: liveins: $d0
    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
    ; CHECK: [[INTRINSIC_LRINT:%[0-9]+]]:_(s64) = G_INTRINSIC_LRINT [[COPY]](s64)
    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[INTRINSIC_LRINT]](s64)
    ; CHECK: $w0 = COPY [[TRUNC]](s32)
    ; CHECK: RET_ReallyLR implicit $w0
    %0:_(s64) = COPY $d0
    %1:_(s64) = G_INTRINSIC_LRINT %0(s64)
    %2:_(s32) = G_TRUNC %1(s64)
    $w0 = COPY %2(s32)
    RET_ReallyLR implicit $w0

...
---
name:            testmsxd
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$d0' }
body:             |
  bb.1:
    liveins: $d0

    ; CHECK-LABEL: name: testmsxd
    ; CHECK: liveins: $d0
    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
    ; CHECK: [[INTRINSIC_LRINT:%[0-9]+]]:_(s64) = G_INTRINSIC_LRINT [[COPY]](s64)
    ; CHECK: $x0 = COPY [[INTRINSIC_LRINT]](s64)
    ; CHECK: RET_ReallyLR implicit $x0
    %0:_(s64) = COPY $d0
    %1:_(s64) = G_INTRINSIC_LRINT %0(s64)
    $x0 = COPY %1(s64)
    RET_ReallyLR implicit $x0

...