blob: 5e5cbf63bb0736941ed5a2caa43892b595575301 [file] [log] [blame]
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - -verify-machineinstrs | FileCheck %s
--- |
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64"
declare i16 @llvm.bswap.i16(i16) #0
define i16 @bswap_s16(i16 %a) { ret i16 0 }
attributes #0 = { nounwind readnone speculatable willreturn }
...
---
name: bswap_s16
alignment: 4
tracksRegLiveness: true
liveins:
- { reg: '$w0' }
frameInfo:
maxAlignment: 1
machineFunctionInfo: {}
body: |
bb.1:
liveins: $w0
; CHECK-LABEL: name: bswap_s16
; CHECK: liveins: $w0
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; CHECK: [[BSWAP:%[0-9]+]]:_(s32) = G_BSWAP [[COPY1]]
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BSWAP]], [[C]](s64)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: $w0 = COPY [[COPY2]](s32)
; CHECK: RET_ReallyLR implicit $w0
%1:_(s32) = COPY $w0
%0:_(s16) = G_TRUNC %1(s32)
%2:_(s16) = G_BSWAP %0
%3:_(s32) = G_ANYEXT %2(s16)
$w0 = COPY %3(s32)
RET_ReallyLR implicit $w0
...