| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s |
| --- |
| name: shift_immed_chain_mismatch_size_crash |
| alignment: 4 |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$x0' } |
| body: | |
| ; CHECK-LABEL: name: shift_immed_chain_mismatch_size_crash |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $x0 |
| ; CHECK: [[DEF:%[0-9]+]]:_(s1) = G_IMPLICIT_DEF |
| ; CHECK: [[DEF1:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 9 |
| ; CHECK: G_BRCOND [[DEF]](s1), %bb.2 |
| ; CHECK: G_BR %bb.1 |
| ; CHECK: bb.1: |
| ; CHECK: successors: |
| ; CHECK: bb.2: |
| ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[DEF1]](p0) :: (load 4 from `i32* undef`, align 8) |
| ; CHECK: [[MUL:%[0-9]+]]:_(s32) = nsw G_MUL [[C]], [[LOAD]] |
| ; CHECK: [[MUL1:%[0-9]+]]:_(s32) = nsw G_MUL [[MUL]], [[C1]] |
| ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 |
| ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[MUL1]], [[C2]](s64) |
| ; CHECK: $w0 = COPY [[SHL]](s32) |
| ; CHECK: RET_ReallyLR implicit $w0 |
| bb.1: |
| liveins: $x0 |
| |
| %0:_(p0) = COPY $x0 |
| %1:_(s1) = G_IMPLICIT_DEF |
| %3:_(p0) = G_IMPLICIT_DEF |
| %4:_(s32) = G_CONSTANT i32 16 |
| %6:_(s32) = G_CONSTANT i32 9 |
| %8:_(s32) = G_CONSTANT i32 2 |
| %11:_(s64) = G_CONSTANT i64 2 |
| G_BRCOND %1(s1), %bb.2 |
| G_BR %bb.3 |
| |
| bb.2: |
| successors: |
| |
| |
| bb.3: |
| %2:_(s32) = G_LOAD %3(p0) :: (load 4 from `i32* undef`, align 8) |
| %5:_(s32) = nsw G_MUL %4, %2 |
| %7:_(s32) = nsw G_MUL %5, %6 |
| %9:_(s32) = nsw G_MUL %7, %8 |
| %10:_(s64) = G_SEXT %9(s32) |
| %12:_(s64) = G_MUL %10, %11 |
| %13:_(s32) = G_TRUNC %12(s64) |
| $w0 = COPY %13(s32) |
| RET_ReallyLR implicit $w0 |
| |
| ... |
