| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| ; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_100 -mattr=+ptx86| FileCheck --check-prefixes=CHECK %s |
| ; RUN: %if ptxas-12.8 %{ llc < %s -mtriple=nvptx64 -mcpu=sm_100 -mattr=+ptx86| %ptxas-verify -arch=sm_100 %} |
| |
| declare i32 @llvm.nvvm.f2tf32.rn.satfinite(float %f1) |
| declare i32 @llvm.nvvm.f2tf32.rn.relu.satfinite(float %f1) |
| declare i32 @llvm.nvvm.f2tf32.rz.satfinite(float %f1) |
| declare i32 @llvm.nvvm.f2tf32.rz.relu.satfinite(float %f1) |
| |
| define i32 @cvt_rn_satf_tf32_f32(float %f1) { |
| ; CHECK-LABEL: cvt_rn_satf_tf32_f32( |
| ; CHECK: { |
| ; CHECK-NEXT: .reg .b32 %r<3>; |
| ; CHECK-EMPTY: |
| ; CHECK-NEXT: // %bb.0: |
| ; CHECK-NEXT: ld.param.b32 %r1, [cvt_rn_satf_tf32_f32_param_0]; |
| ; CHECK-NEXT: cvt.rn.satfinite.tf32.f32 %r2, %r1; |
| ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; |
| ; CHECK-NEXT: ret; |
| %val = call i32 @llvm.nvvm.f2tf32.rn.satfinite(float %f1) |
| ret i32 %val |
| } |
| |
| define i32 @cvt_rn_relu_satf_tf32_f32(float %f1) { |
| ; CHECK-LABEL: cvt_rn_relu_satf_tf32_f32( |
| ; CHECK: { |
| ; CHECK-NEXT: .reg .b32 %r<3>; |
| ; CHECK-EMPTY: |
| ; CHECK-NEXT: // %bb.0: |
| ; CHECK-NEXT: ld.param.b32 %r1, [cvt_rn_relu_satf_tf32_f32_param_0]; |
| ; CHECK-NEXT: cvt.rn.relu.satfinite.tf32.f32 %r2, %r1; |
| ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; |
| ; CHECK-NEXT: ret; |
| %val = call i32 @llvm.nvvm.f2tf32.rn.relu.satfinite(float %f1) |
| ret i32 %val |
| } |
| |
| define i32 @cvt_rz_satf_tf32_f32(float %f1) { |
| ; CHECK-LABEL: cvt_rz_satf_tf32_f32( |
| ; CHECK: { |
| ; CHECK-NEXT: .reg .b32 %r<3>; |
| ; CHECK-EMPTY: |
| ; CHECK-NEXT: // %bb.0: |
| ; CHECK-NEXT: ld.param.b32 %r1, [cvt_rz_satf_tf32_f32_param_0]; |
| ; CHECK-NEXT: cvt.rz.satfinite.tf32.f32 %r2, %r1; |
| ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; |
| ; CHECK-NEXT: ret; |
| %val = call i32 @llvm.nvvm.f2tf32.rz.satfinite(float %f1) |
| ret i32 %val |
| } |
| |
| define i32 @cvt_rz_relu_satf_tf32_f32(float %f1) { |
| ; CHECK-LABEL: cvt_rz_relu_satf_tf32_f32( |
| ; CHECK: { |
| ; CHECK-NEXT: .reg .b32 %r<3>; |
| ; CHECK-EMPTY: |
| ; CHECK-NEXT: // %bb.0: |
| ; CHECK-NEXT: ld.param.b32 %r1, [cvt_rz_relu_satf_tf32_f32_param_0]; |
| ; CHECK-NEXT: cvt.rz.relu.satfinite.tf32.f32 %r2, %r1; |
| ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; |
| ; CHECK-NEXT: ret; |
| %val = call i32 @llvm.nvvm.f2tf32.rz.relu.satfinite(float %f1) |
| ret i32 %val |
| } |