blob: 60f7f6c7dd768d92f8d0dc2e159c584277c6ee4e [file] [log] [blame]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=licm < %s | FileCheck %s
define i32 @j() {
; CHECK-LABEL: @j(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
; CHECK-NEXT: to label [[COND_TRUE_I:%.*]] [label %for.end.split.loop.exit1]
; CHECK: cond.true.i:
; CHECK-NEXT: br i1 true, label [[FOR_END_SPLIT_LOOP_EXIT:%.*]], label [[FOR_COND]]
; CHECK: for.end.split.loop.exit:
; CHECK-NEXT: [[ASMRESULT1_I_I_LE:%.*]] = extractvalue { i8, i32 } zeroinitializer, 1
; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.end.split.loop.exit1:
; CHECK-NEXT: [[PHI_PH2:%.*]] = phi i32 [ undef, [[FOR_COND]] ]
; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[ASMRESULT1_I_I_LE]], [[FOR_END_SPLIT_LOOP_EXIT]] ], [ [[PHI_PH2]], [[FOR_END_SPLIT_LOOP_EXIT1:%.*]] ]
; CHECK-NEXT: ret i32 [[PHI]]
;
entry:
br label %for.cond
for.cond: ; preds = %cond.true.i, %entry
callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
to label %cond.true.i [label %for.end]
cond.true.i: ; preds = %for.cond
%asmresult1.i.i = extractvalue { i8, i32 } zeroinitializer, 1
br i1 undef, label %for.end, label %for.cond
for.end: ; preds = %cond.true.i, %for.cond
%phi = phi i32 [ %asmresult1.i.i, %cond.true.i ], [ undef, %for.cond ]
ret i32 %phi
}
declare void @use_i32(i32)
define void @pr64215() {
; CHECK-LABEL: @pr64215(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X:%.*]] = callbr i32 asm sideeffect "", "=r"()
; CHECK-NEXT: to label [[LOOP_PREHEADER:%.*]] []
; CHECK: loop.preheader:
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X]], 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: call void @use_i32(i32 [[ADD]])
; CHECK-NEXT: br label [[LOOP]]
;
entry:
%x = callbr i32 asm sideeffect "", "=r"()
to label %loop []
loop:
%add = add i32 %x, 1
call void @use_i32(i32 %add)
br label %loop
}