| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| ; RUN: opt -S -passes=verify,iroutliner --ir-outlining-no-cost < %s | FileCheck %s |
| ; RUN: opt -S -passes=verify,iroutliner -enable-linkonceodr-ir-outlining --ir-outlining-no-cost < %s | FileCheck -check-prefix=ODR %s |
| |
| ; This test looks at the constants in the regions, and if it they are the |
| ; same it outlines them as constants rather than elevating them to arguments. |
| |
| define linkonce_odr void @outline_odr1() { |
| ; ODR-LABEL: @outline_odr1( |
| ; ODR-NEXT: entry: |
| ; ODR-NEXT: [[A:%.*]] = alloca i32, align 4 |
| ; ODR-NEXT: [[B:%.*]] = alloca i32, align 4 |
| ; ODR-NEXT: [[C:%.*]] = alloca i32, align 4 |
| ; ODR-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]]) |
| ; ODR-NEXT: ret void |
| ; CHECK-LABEL: @outline_odr1( |
| ; CHECK-NEXT: entry: |
| ; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 |
| ; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4 |
| ; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4 |
| ; CHECK-NEXT: store i32 2, ptr [[A]], align 4 |
| ; CHECK-NEXT: store i32 3, ptr [[B]], align 4 |
| ; CHECK-NEXT: store i32 4, ptr [[C]], align 4 |
| ; CHECK-NEXT: [[AL:%.*]] = load i32, ptr [[A]], align 4 |
| ; CHECK-NEXT: [[BL:%.*]] = load i32, ptr [[B]], align 4 |
| ; CHECK-NEXT: [[CL:%.*]] = load i32, ptr [[C]], align 4 |
| entry: |
| %a = alloca i32, align 4 |
| %b = alloca i32, align 4 |
| %c = alloca i32, align 4 |
| store i32 2, ptr %a, align 4 |
| store i32 3, ptr %b, align 4 |
| store i32 4, ptr %c, align 4 |
| %al = load i32, ptr %a |
| %bl = load i32, ptr %b |
| %cl = load i32, ptr %c |
| ret void |
| } |
| |
| define void @outline_odr2() { |
| ; ODR-LABEL: @outline_odr2( |
| ; ODR-NEXT: entry: |
| ; ODR-NEXT: [[A:%.*]] = alloca i32, align 4 |
| ; ODR-NEXT: [[B:%.*]] = alloca i32, align 4 |
| ; ODR-NEXT: [[C:%.*]] = alloca i32, align 4 |
| ; ODR-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]]) |
| ; ODR-NEXT: ret void |
| ; CHECK-LABEL: @outline_odr2( |
| ; CHECK-NEXT: entry: |
| ; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 |
| ; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4 |
| ; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4 |
| ; CHECK-NEXT: store i32 2, ptr [[A]], align 4 |
| ; CHECK-NEXT: store i32 3, ptr [[B]], align 4 |
| ; CHECK-NEXT: store i32 4, ptr [[C]], align 4 |
| ; CHECK-NEXT: [[AL:%.*]] = load i32, ptr [[A]], align 4 |
| ; CHECK-NEXT: [[BL:%.*]] = load i32, ptr [[B]], align 4 |
| ; CHECK-NEXT: [[CL:%.*]] = load i32, ptr [[C]], align 4 |
| entry: |
| %a = alloca i32, align 4 |
| %b = alloca i32, align 4 |
| %c = alloca i32, align 4 |
| store i32 2, ptr %a, align 4 |
| store i32 3, ptr %b, align 4 |
| store i32 4, ptr %c, align 4 |
| %al = load i32, ptr %a |
| %bl = load i32, ptr %b |
| %cl = load i32, ptr %c |
| ret void |
| } |