| ; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=powerpc64-- -O3 \ |
| ; RUN: -debug-pass=Structure < %s -o /dev/null 2>&1 | \ |
| ; RUN: grep -v "Verify generated machine code" | FileCheck %s |
| |
| ; REQUIRES: asserts |
| ; CHECK-LABEL: Pass Arguments: |
| ; CHECK-NEXT: Target Library Information |
| ; CHECK-NEXT: Target Pass Configuration |
| ; CHECK-NEXT: Machine Module Information |
| ; CHECK-NEXT: Target Transform Information |
| ; CHECK-NEXT: Assumption Cache Tracker |
| ; CHECK-NEXT: Type-Based Alias Analysis |
| ; CHECK-NEXT: Scoped NoAlias Alias Analysis |
| ; CHECK-NEXT: Profile summary info |
| ; CHECK-NEXT: Create Garbage Collector Module Metadata |
| ; CHECK-NEXT: Machine Branch Probability Analysis |
| ; CHECK-NEXT: Default Regalloc Eviction Advisor |
| ; CHECK-NEXT: ModulePass Manager |
| ; CHECK-NEXT: Pre-ISel Intrinsic Lowering |
| ; CHECK-NEXT: FunctionPass Manager |
| ; CHECK-NEXT: Convert i1 constants to i32/i64 if they are returned |
| ; CHECK-NEXT: Expand Atomic instructions |
| ; CHECK-NEXT: PPC Lower MASS Entries |
| ; CHECK-NEXT: FunctionPass Manager |
| ; CHECK-NEXT: Dominator Tree Construction |
| ; CHECK-NEXT: Natural Loop Information |
| ; CHECK-NEXT: Scalar Evolution Analysis |
| ; CHECK-NEXT: Split GEPs to a variadic base and a constant offset for better CSE |
| ; CHECK-NEXT: Early CSE |
| ; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) |
| ; CHECK-NEXT: Function Alias Analysis Results |
| ; CHECK-NEXT: Memory SSA |
| ; CHECK-NEXT: Canonicalize natural loops |
| ; CHECK-NEXT: LCSSA Verifier |
| ; CHECK-NEXT: Loop-Closed SSA Form Pass |
| ; CHECK-NEXT: Scalar Evolution Analysis |
| ; CHECK-NEXT: Lazy Branch Probability Analysis |
| ; CHECK-NEXT: Lazy Block Frequency Analysis |
| ; CHECK-NEXT: Loop Pass Manager |
| ; CHECK-NEXT: Loop Invariant Code Motion |
| ; CHECK-NEXT: Module Verifier |
| ; CHECK-NEXT: Loop Pass Manager |
| ; CHECK-NEXT: Canonicalize Freeze Instructions in Loops |
| ; CHECK-NEXT: Induction Variable Users |
| ; CHECK-NEXT: Loop Strength Reduction |
| ; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) |
| ; CHECK-NEXT: Function Alias Analysis Results |
| ; CHECK-NEXT: Merge contiguous icmps into a memcmp |
| ; CHECK-NEXT: Natural Loop Information |
| ; CHECK-NEXT: Lazy Branch Probability Analysis |
| ; CHECK-NEXT: Lazy Block Frequency Analysis |
| ; CHECK-NEXT: Expand memcmp() to load/stores |
| ; CHECK-NEXT: Lower Garbage Collection Instructions |
| ; CHECK-NEXT: Shadow Stack GC Lowering |
| ; CHECK-NEXT: Lower constant intrinsics |
| ; CHECK-NEXT: Remove unreachable blocks from the CFG |
| ; CHECK-NEXT: Natural Loop Information |
| ; CHECK-NEXT: Post-Dominator Tree Construction |
| ; CHECK-NEXT: Branch Probability Analysis |
| ; CHECK-NEXT: Block Frequency Analysis |
| ; CHECK-NEXT: Constant Hoisting |
| ; CHECK-NEXT: Replace intrinsics with calls to vector library |
| ; CHECK-NEXT: Partially inline calls to library functions |
| ; CHECK-NEXT: Expand vector predication intrinsics |
| ; CHECK-NEXT: Scalarize Masked Memory Intrinsics |
| ; CHECK-NEXT: Expand reduction intrinsics |
| ; CHECK-NEXT: Natural Loop Information |
| ; CHECK-NEXT: TLS Variable Hoist |
| ; CHECK-NEXT: CodeGen Prepare |
| ; CHECK-NEXT: Dominator Tree Construction |
| ; CHECK-NEXT: Exception handling preparation |
| ; CHECK-NEXT: Natural Loop Information |
| ; CHECK-NEXT: Scalar Evolution Analysis |
| ; CHECK-NEXT: Prepare loop for ppc preferred instruction forms |
| ; CHECK-NEXT: Scalar Evolution Analysis |
| ; CHECK-NEXT: Lazy Branch Probability Analysis |
| ; CHECK-NEXT: Lazy Block Frequency Analysis |
| ; CHECK-NEXT: Optimization Remark Emitter |
| ; CHECK-NEXT: Hardware Loop Insertion |
| ; CHECK-NEXT: Safe Stack instrumentation pass |
| ; CHECK-NEXT: Insert stack protectors |
| ; CHECK-NEXT: Module Verifier |
| ; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) |
| ; CHECK-NEXT: Function Alias Analysis Results |
| ; CHECK-NEXT: Natural Loop Information |
| ; CHECK-NEXT: Post-Dominator Tree Construction |
| ; CHECK-NEXT: Branch Probability Analysis |
| ; CHECK-NEXT: Lazy Branch Probability Analysis |
| ; CHECK-NEXT: Lazy Block Frequency Analysis |
| ; CHECK-NEXT: PowerPC DAG->DAG Pattern Instruction Selection |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: PowerPC CTR Loops Verify |
| ; CHECK-NEXT: PowerPC VSX Copy Legalization |
| ; CHECK-NEXT: Finalize ISel and expand pseudo-instructions |
| ; CHECK-NEXT: Lazy Machine Block Frequency Analysis |
| ; CHECK-NEXT: Early Tail Duplication |
| ; CHECK-NEXT: Optimize machine instruction PHIs |
| ; CHECK-NEXT: Slot index numbering |
| ; CHECK-NEXT: Merge disjoint stack slots |
| ; CHECK-NEXT: Local Stack Slot Allocation |
| ; CHECK-NEXT: Remove dead machine instructions |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: Machine Natural Loop Construction |
| ; CHECK-NEXT: Machine Trace Metrics |
| ; CHECK-NEXT: Early If-Conversion |
| ; CHECK-NEXT: Lazy Machine Block Frequency Analysis |
| ; CHECK-NEXT: Machine InstCombiner |
| ; CHECK-NEXT: Machine Block Frequency Analysis |
| ; CHECK-NEXT: Early Machine Loop Invariant Code Motion |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: Machine Block Frequency Analysis |
| ; CHECK-NEXT: Machine Common Subexpression Elimination |
| ; CHECK-NEXT: MachinePostDominator Tree Construction |
| ; CHECK-NEXT: Machine Cycle Info Analysis |
| ; CHECK-NEXT: Machine code sinking |
| ; CHECK-NEXT: Peephole Optimizations |
| ; CHECK-NEXT: Remove dead machine instructions |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: PowerPC Reduce CR logical Operation |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: MachinePostDominator Tree Construction |
| ; CHECK-NEXT: Machine Natural Loop Construction |
| ; CHECK-NEXT: Machine Block Frequency Analysis |
| ; CHECK-NEXT: PowerPC MI Peephole Optimization |
| ; CHECK-NEXT: Remove dead machine instructions |
| ; CHECK-NEXT: Remove unreachable machine basic blocks |
| ; CHECK-NEXT: Live Variable Analysis |
| ; CHECK-NEXT: Slot index numbering |
| ; CHECK-NEXT: Live Interval Analysis |
| ; CHECK-NEXT: PowerPC TLS Dynamic Call Fixup |
| ; CHECK-NEXT: PowerPC TOC Register Dependencies |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: Machine Natural Loop Construction |
| ; CHECK-NEXT: PowerPC CTR loops generation |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: Machine Natural Loop Construction |
| ; CHECK-NEXT: Slot index numbering |
| ; CHECK-NEXT: Live Interval Analysis |
| ; CHECK-NEXT: Lazy Machine Block Frequency Analysis |
| ; CHECK-NEXT: Machine Optimization Remark Emitter |
| ; CHECK-NEXT: Modulo Software Pipelining |
| ; CHECK-NEXT: Detect Dead Lanes |
| ; CHECK-NEXT: Process Implicit Definitions |
| ; CHECK-NEXT: Remove unreachable machine basic blocks |
| ; CHECK-NEXT: Live Variable Analysis |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: Machine Natural Loop Construction |
| ; CHECK-NEXT: Eliminate PHI nodes for register allocation |
| ; CHECK-NEXT: Two-Address instruction pass |
| ; CHECK-NEXT: Slot index numbering |
| ; CHECK-NEXT: Live Interval Analysis |
| ; CHECK-NEXT: Simple Register Coalescing |
| ; CHECK-NEXT: Rename Disconnected Subregister Components |
| ; CHECK-NEXT: Machine Instruction Scheduler |
| ; CHECK-NEXT: PowerPC VSX FMA Mutation |
| ; CHECK-NEXT: Machine Natural Loop Construction |
| ; CHECK-NEXT: Machine Block Frequency Analysis |
| ; CHECK-NEXT: Debug Variable Analysis |
| ; CHECK-NEXT: Live Stack Slot Analysis |
| ; CHECK-NEXT: Virtual Register Map |
| ; CHECK-NEXT: Live Register Matrix |
| ; CHECK-NEXT: Bundle Machine CFG Edges |
| ; CHECK-NEXT: Spill Code Placement Analysis |
| ; CHECK-NEXT: Lazy Machine Block Frequency Analysis |
| ; CHECK-NEXT: Machine Optimization Remark Emitter |
| ; CHECK-NEXT: Greedy Register Allocator |
| ; CHECK-NEXT: Virtual Register Rewriter |
| ; CHECK-NEXT: Register Allocation Pass Scoring |
| ; CHECK-NEXT: Stack Slot Coloring |
| ; CHECK-NEXT: Machine Copy Propagation Pass |
| ; CHECK-NEXT: Machine Loop Invariant Code Motion |
| ; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis |
| ; CHECK-NEXT: Fixup Statepoint Caller Saved |
| ; CHECK-NEXT: PostRA Machine Sink |
| ; CHECK-NEXT: Machine Block Frequency Analysis |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: MachinePostDominator Tree Construction |
| ; CHECK-NEXT: Lazy Machine Block Frequency Analysis |
| ; CHECK-NEXT: Machine Optimization Remark Emitter |
| ; CHECK-NEXT: Shrink Wrapping analysis |
| ; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization |
| ; CHECK-NEXT: Control Flow Optimizer |
| ; CHECK-NEXT: Lazy Machine Block Frequency Analysis |
| ; CHECK-NEXT: Tail Duplication |
| ; CHECK-NEXT: Machine Copy Propagation Pass |
| ; CHECK-NEXT: Post-RA pseudo instruction expansion pass |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: Machine Natural Loop Construction |
| ; CHECK-NEXT: Machine Block Frequency Analysis |
| ; CHECK-NEXT: If Converter |
| ; CHECK-NEXT: MachineDominator Tree Construction |
| ; CHECK-NEXT: Machine Natural Loop Construction |
| ; CHECK-NEXT: PostRA Machine Instruction Scheduler |
| ; CHECK-NEXT: Analyze Machine Code For Garbage Collection |
| ; CHECK-NEXT: Machine Block Frequency Analysis |
| ; CHECK-NEXT: MachinePostDominator Tree Construction |
| ; CHECK-NEXT: Branch Probability Basic Block Placement |
| ; CHECK-NEXT: Insert fentry calls |
| ; CHECK-NEXT: Insert XRay ops |
| ; CHECK-NEXT: Implement the 'patchable-function' attribute |
| ; CHECK-NEXT: PowerPC Pre-Emit Peephole |
| ; CHECK-NEXT: PowerPC Expand ISEL Generation |
| ; CHECK-NEXT: PowerPC Early-Return Creation |
| ; CHECK-NEXT: Contiguously Lay Out Funclets |
| ; CHECK-NEXT: StackMap Liveness Analysis |
| ; CHECK-NEXT: Live DEBUG_VALUE analysis |
| ; CHECK-NEXT: PowerPC Expand Atomic |
| ; CHECK-NEXT: PowerPC Branch Selector |
| ; CHECK-NEXT: Lazy Machine Block Frequency Analysis |
| ; CHECK-NEXT: Machine Optimization Remark Emitter |
| ; CHECK-NEXT: Linux PPC Assembly Printer |
| ; CHECK-NEXT: Free MachineFunction |
| |
| define void @f() { |
| ret void |
| } |