| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -o - %s | FileCheck -check-prefix=GFX6 %s |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer -o - %s | FileCheck -check-prefix=GFX9 %s |
| |
| --- |
| name: test_fpowi_s16_s32_flags |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; GFX6-LABEL: name: test_fpowi_s16_s32_flags |
| ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX6: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) |
| ; GFX6: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) |
| ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY1]](s32) |
| ; GFX6: [[FLOG2_:%[0-9]+]]:_(s32) = nnan G_FLOG2 [[FPEXT]] |
| ; GFX6: [[INT:%[0-9]+]]:_(s32) = nnan G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), [[FLOG2_]](s32), [[SITOFP]](s32) |
| ; GFX6: [[FEXP2_:%[0-9]+]]:_(s32) = nnan G_FEXP2 [[INT]] |
| ; GFX6: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FEXP2_]](s32) |
| ; GFX6: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16) |
| ; GFX6: $vgpr0 = COPY [[ANYEXT]](s32) |
| ; GFX9-LABEL: name: test_fpowi_s16_s32_flags |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) |
| ; GFX9: [[SITOFP:%[0-9]+]]:_(s16) = G_SITOFP [[COPY1]](s32) |
| ; GFX9: [[FLOG2_:%[0-9]+]]:_(s16) = nnan G_FLOG2 [[TRUNC]] |
| ; GFX9: [[FPEXT:%[0-9]+]]:_(s32) = nnan G_FPEXT [[FLOG2_]](s16) |
| ; GFX9: [[FPEXT1:%[0-9]+]]:_(s32) = nnan G_FPEXT [[SITOFP]](s16) |
| ; GFX9: [[INT:%[0-9]+]]:_(s32) = nnan G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), [[FPEXT]](s32), [[FPEXT1]](s32) |
| ; GFX9: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INT]](s32) |
| ; GFX9: [[FEXP2_:%[0-9]+]]:_(s16) = nnan G_FEXP2 [[FPTRUNC]] |
| ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FEXP2_]](s16) |
| ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s16) = G_TRUNC %0 |
| %3:_(s16) = nnan G_FPOWI %2, %1 |
| %4:_(s32) = G_ANYEXT %3 |
| $vgpr0 = COPY %4 |
| ... |
| |
| --- |
| name: test_fpowi_s32_s32_flags |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; GFX6-LABEL: name: test_fpowi_s32_s32_flags |
| ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY1]](s32) |
| ; GFX6: [[FLOG2_:%[0-9]+]]:_(s32) = nnan G_FLOG2 [[COPY]] |
| ; GFX6: [[INT:%[0-9]+]]:_(s32) = nnan G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), [[FLOG2_]](s32), [[SITOFP]](s32) |
| ; GFX6: [[FEXP2_:%[0-9]+]]:_(s32) = nnan G_FEXP2 [[INT]] |
| ; GFX6: $vgpr0 = COPY [[FEXP2_]](s32) |
| ; GFX9-LABEL: name: test_fpowi_s32_s32_flags |
| ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; GFX9: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY1]](s32) |
| ; GFX9: [[FLOG2_:%[0-9]+]]:_(s32) = nnan G_FLOG2 [[COPY]] |
| ; GFX9: [[INT:%[0-9]+]]:_(s32) = nnan G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), [[FLOG2_]](s32), [[SITOFP]](s32) |
| ; GFX9: [[FEXP2_:%[0-9]+]]:_(s32) = nnan G_FEXP2 [[INT]] |
| ; GFX9: $vgpr0 = COPY [[FEXP2_]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = nnan G_FPOWI %0, %1 |
| $vgpr0 = COPY %2 |
| ... |