| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s |
| |
| --- |
| name: bitreverse_i32_ss |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| ; CHECK-LABEL: name: bitreverse_i32_ss |
| ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; CHECK: [[S_BREV_B32_:%[0-9]+]]:sreg_32 = S_BREV_B32 [[COPY]] |
| ; CHECK: S_ENDPGM 0, implicit [[S_BREV_B32_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s32) = G_BITREVERSE %0 |
| S_ENDPGM 0, implicit %1 |
| ... |
| |
| --- |
| name: bitreverse_i32_vv |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; CHECK-LABEL: name: bitreverse_i32_vv |
| ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK: [[V_BFREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_BFREV_B32_e64 [[COPY]], implicit $exec |
| ; CHECK: S_ENDPGM 0, implicit [[V_BFREV_B32_e64_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s32) = G_BITREVERSE %0 |
| S_ENDPGM 0, implicit %1 |
| ... |
| |
| --- |
| name: bitreverse_i32_vs |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| ; CHECK-LABEL: name: bitreverse_i32_vs |
| ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; CHECK: [[V_BFREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_BFREV_B32_e64 [[COPY]], implicit $exec |
| ; CHECK: S_ENDPGM 0, implicit [[V_BFREV_B32_e64_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:vgpr(s32) = G_BITREVERSE %0 |
| S_ENDPGM 0, implicit %1 |
| ... |