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llvm
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0b79c7d23b0d4bb7773b65aa0f012e4490b77002
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.
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test
/
CodeGen
/
ARM
/
ispositive.ll
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; RUN: llc < %s -march=arm | FileCheck %s
define
i32
@test1
(
i32
%X
)
{
; CHECK: mov r0, r0, lsr #31
entry
:
icmp
slt
i32
%X
,
0
; <i1>:0 [#uses=1]
zext
i1
%0
to
i32
; <i32>:1 [#uses=1]
ret
i32
%1
}