| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - 2> %t | FileCheck -check-prefix=GCN %s |
| # RUN: FileCheck -check-prefix=ERR %s < %t |
| |
| # ERR: remark: <unknown>:0:0: cannot select: %1:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), %0:sgpr(s32) (in function: readfirstlane_s) |
| |
| --- |
| name: readfirstlane_v |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: readfirstlane_v |
| ; GCN: liveins: $vgpr0 |
| ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec |
| ; GCN: S_ENDPGM 0, implicit [[V_READFIRSTLANE_B32_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), %0 |
| S_ENDPGM 0, implicit %1 |
| ... |
| |
| --- |
| name: readfirstlane_v_imm |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| |
| body: | |
| bb.0: |
| |
| ; GCN-LABEL: name: readfirstlane_v_imm |
| ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 123, implicit $exec |
| ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY [[V_MOV_B32_e32_]] |
| ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 [[COPY]] |
| ; GCN: S_ENDPGM 0, implicit [[S_MOV_B32_]] |
| %0:vgpr(s32) = G_CONSTANT i32 123 |
| %1:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), %0 |
| S_ENDPGM 0, implicit %1 |
| ... |
| |
| # Make sure this fails to select |
| --- |
| name: readfirstlane_s |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| ; GCN-LABEL: name: readfirstlane_s |
| ; GCN: liveins: $sgpr0 |
| ; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 |
| ; GCN: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), [[COPY]](s32) |
| ; GCN: S_ENDPGM 0, implicit [[INT]](s32) |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), %0 |
| S_ENDPGM 0, implicit %1 |
| ... |