| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py |
| // REQUIRES: aarch64-registered-target |
| // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s |
| // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK |
| // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s |
| // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK |
| // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s |
| #include <arm_sve.h> |
| |
| #ifdef SVE_OVERLOADED_FORMS |
| // A simple used,unused... macro, long enough to represent any SVE builtin. |
| #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 |
| #else |
| #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 |
| #endif |
| |
| // CHECK-LABEL: @test_svdup_n_s8( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z15test_svdup_n_s8a( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| svint8_t test_svdup_n_s8(int8_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s8,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_s16s( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]] |
| // |
| svint16_t test_svdup_n_s16(int16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s16,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_s32i( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]] |
| // |
| svint32_t test_svdup_n_s32(int32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s32,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_s64l( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]] |
| // |
| svint64_t test_svdup_n_s64(int64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s64,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u8( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z15test_svdup_n_u8h( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| svuint8_t test_svdup_n_u8(uint8_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u8,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_u16t( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]] |
| // |
| svuint16_t test_svdup_n_u16(uint16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u16,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_u32j( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]] |
| // |
| svuint32_t test_svdup_n_u32(uint32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u32,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_u64m( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]] |
| // |
| svuint64_t test_svdup_n_u64(uint64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u64,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x half> poison, half [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x half> [[DOTSPLATINSERT]], <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_f16Dh( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x half> poison, half [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x half> [[DOTSPLATINSERT]], <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]] |
| // |
| svfloat16_t test_svdup_n_f16(float16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f16,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x float> poison, float [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x float> [[DOTSPLATINSERT]], <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_f32f( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x float> poison, float [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x float> [[DOTSPLATINSERT]], <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]] |
| // |
| svfloat32_t test_svdup_n_f32(float32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f32,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x double> poison, double [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x double> [[DOTSPLATINSERT]], <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_f64d( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x double> poison, double [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x double> [[DOTSPLATINSERT]], <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]] |
| // |
| svfloat64_t test_svdup_n_f64(float64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f64,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s8_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_zu10__SVBool_ta( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| svint8_t test_svdup_n_s8_z(svbool_t pg, int8_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s8_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s16_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_zu10__SVBool_ts( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| svint16_t test_svdup_n_s16_z(svbool_t pg, int16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s16_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s32_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_zu10__SVBool_ti( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| svint32_t test_svdup_n_s32_z(svbool_t pg, int32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s32_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s64_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_zu10__SVBool_tl( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| svint64_t test_svdup_n_s64_z(svbool_t pg, int64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s64_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u8_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_zu10__SVBool_th( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| svuint8_t test_svdup_n_u8_z(svbool_t pg, uint8_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u8_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u16_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_zu10__SVBool_tt( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| svuint16_t test_svdup_n_u16_z(svbool_t pg, uint16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u16_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u32_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_zu10__SVBool_tj( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| svuint32_t test_svdup_n_u32_z(svbool_t pg, uint32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u32_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u64_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_zu10__SVBool_tm( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| svuint64_t test_svdup_n_u64_z(svbool_t pg, uint64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u64_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f16_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_zu10__SVBool_tDh( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]] |
| // |
| svfloat16_t test_svdup_n_f16_z(svbool_t pg, float16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f16_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f32_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_zu10__SVBool_tf( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]] |
| // |
| svfloat32_t test_svdup_n_f32_z(svbool_t pg, float32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f32_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f64_z( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_zu10__SVBool_td( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]] |
| // |
| svfloat64_t test_svdup_n_f64_z(svbool_t pg, float64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f64_z,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s8_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_mu10__SVInt8_tu10__SVBool_ta( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| svint8_t test_svdup_n_s8_m(svint8_t inactive, svbool_t pg, int8_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s8_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s16_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_mu11__SVInt16_tu10__SVBool_ts( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| svint16_t test_svdup_n_s16_m(svint16_t inactive, svbool_t pg, int16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s16_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s32_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_mu11__SVInt32_tu10__SVBool_ti( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| svint32_t test_svdup_n_s32_m(svint32_t inactive, svbool_t pg, int32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s32_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s64_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_mu11__SVInt64_tu10__SVBool_tl( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| svint64_t test_svdup_n_s64_m(svint64_t inactive, svbool_t pg, int64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s64_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u8_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_mu11__SVUint8_tu10__SVBool_th( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| svuint8_t test_svdup_n_u8_m(svuint8_t inactive, svbool_t pg, uint8_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u8_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u16_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_mu12__SVUint16_tu10__SVBool_tt( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| svuint16_t test_svdup_n_u16_m(svuint16_t inactive, svbool_t pg, uint16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u16_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u32_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_mu12__SVUint32_tu10__SVBool_tj( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| svuint32_t test_svdup_n_u32_m(svuint32_t inactive, svbool_t pg, uint32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u32_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u64_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_mu12__SVUint64_tu10__SVBool_tm( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| svuint64_t test_svdup_n_u64_m(svuint64_t inactive, svbool_t pg, uint64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u64_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f16_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_mu13__SVFloat16_tu10__SVBool_tDh( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]] |
| // |
| svfloat16_t test_svdup_n_f16_m(svfloat16_t inactive, svbool_t pg, float16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f16_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f32_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_mu13__SVFloat32_tu10__SVBool_tf( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]] |
| // |
| svfloat32_t test_svdup_n_f32_m(svfloat32_t inactive, svbool_t pg, float32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f32_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f64_m( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_mu13__SVFloat64_tu10__SVBool_td( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]] |
| // |
| svfloat64_t test_svdup_n_f64_m(svfloat64_t inactive, svbool_t pg, float64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f64_m,)(inactive, pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s8_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_xu10__SVBool_ta( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| svint8_t test_svdup_n_s8_x(svbool_t pg, int8_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s8_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s16_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_xu10__SVBool_ts( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| svint16_t test_svdup_n_s16_x(svbool_t pg, int16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s16_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s32_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_xu10__SVBool_ti( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| svint32_t test_svdup_n_s32_x(svbool_t pg, int32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s32_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_s64_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_xu10__SVBool_tl( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| svint64_t test_svdup_n_s64_x(svbool_t pg, int64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_s64_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u8_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_xu10__SVBool_th( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], i8 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] |
| // |
| svuint8_t test_svdup_n_u8_x(svbool_t pg, uint8_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u8_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u16_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_xu10__SVBool_tt( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], i16 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| svuint16_t test_svdup_n_u16_x(svbool_t pg, uint16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u16_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u32_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_xu10__SVBool_tj( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], i32 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| svuint32_t test_svdup_n_u32_x(svbool_t pg, uint32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u32_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_u64_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_xu10__SVBool_tm( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], i64 [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| svuint64_t test_svdup_n_u64_x(svbool_t pg, uint64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_u64_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f16_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_xu10__SVBool_tDh( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> [[TMP0]], half [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]] |
| // |
| svfloat16_t test_svdup_n_f16_x(svbool_t pg, float16_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f16_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f32_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_xu10__SVBool_tf( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> [[TMP0]], float [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]] |
| // |
| svfloat32_t test_svdup_n_f32_x(svbool_t pg, float32_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f32_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_f64_x( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]]) |
| // CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_xu10__SVBool_td( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> [[TMP0]], double [[OP:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]] |
| // |
| svfloat64_t test_svdup_n_f64_x(svbool_t pg, float64_t op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_f64_x,)(pg, op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_s8( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8(<vscale x 16 x i8> [[DATA:%.*]], <vscale x 16 x i8> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_lane_s8u10__SVInt8_th( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8(<vscale x 16 x i8> [[DATA:%.*]], <vscale x 16 x i8> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]] |
| // |
| svint8_t test_svdup_lane_s8(svint8_t data, uint8_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_s8,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_s16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16(<vscale x 8 x i16> [[DATA:%.*]], <vscale x 8 x i16> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z19test_svdup_lane_s16u11__SVInt16_tt( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16(<vscale x 8 x i16> [[DATA:%.*]], <vscale x 8 x i16> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| svint16_t test_svdup_lane_s16(svint16_t data, uint16_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_s16,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_s32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32(<vscale x 4 x i32> [[DATA:%.*]], <vscale x 4 x i32> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z19test_svdup_lane_s32u11__SVInt32_tj( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32(<vscale x 4 x i32> [[DATA:%.*]], <vscale x 4 x i32> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| svint32_t test_svdup_lane_s32(svint32_t data, uint32_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_s32,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_s64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64(<vscale x 2 x i64> [[DATA:%.*]], <vscale x 2 x i64> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z19test_svdup_lane_s64u11__SVInt64_tm( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64(<vscale x 2 x i64> [[DATA:%.*]], <vscale x 2 x i64> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| svint64_t test_svdup_lane_s64(svint64_t data, uint64_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_s64,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_u8( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8(<vscale x 16 x i8> [[DATA:%.*]], <vscale x 16 x i8> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svdup_lane_u8u11__SVUint8_th( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8(<vscale x 16 x i8> [[DATA:%.*]], <vscale x 16 x i8> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP1]] |
| // |
| svuint8_t test_svdup_lane_u8(svuint8_t data, uint8_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_u8,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_u16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16(<vscale x 8 x i16> [[DATA:%.*]], <vscale x 8 x i16> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z19test_svdup_lane_u16u12__SVUint16_tt( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16(<vscale x 8 x i16> [[DATA:%.*]], <vscale x 8 x i16> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] |
| // |
| svuint16_t test_svdup_lane_u16(svuint16_t data, uint16_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_u16,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_u32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32(<vscale x 4 x i32> [[DATA:%.*]], <vscale x 4 x i32> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z19test_svdup_lane_u32u12__SVUint32_tj( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32(<vscale x 4 x i32> [[DATA:%.*]], <vscale x 4 x i32> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] |
| // |
| svuint32_t test_svdup_lane_u32(svuint32_t data, uint32_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_u32,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_u64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64(<vscale x 2 x i64> [[DATA:%.*]], <vscale x 2 x i64> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z19test_svdup_lane_u64u12__SVUint64_tm( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64(<vscale x 2 x i64> [[DATA:%.*]], <vscale x 2 x i64> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] |
| // |
| svuint64_t test_svdup_lane_u64(svuint64_t data, uint64_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_u64,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_f16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.tbl.nxv8f16(<vscale x 8 x half> [[DATA:%.*]], <vscale x 8 x i16> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z19test_svdup_lane_f16u13__SVFloat16_tt( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.tbl.nxv8f16(<vscale x 8 x half> [[DATA:%.*]], <vscale x 8 x i16> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP1]] |
| // |
| svfloat16_t test_svdup_lane_f16(svfloat16_t data, uint16_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_f16,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_f32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.tbl.nxv4f32(<vscale x 4 x float> [[DATA:%.*]], <vscale x 4 x i32> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z19test_svdup_lane_f32u13__SVFloat32_tj( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.tbl.nxv4f32(<vscale x 4 x float> [[DATA:%.*]], <vscale x 4 x i32> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]] |
| // |
| svfloat32_t test_svdup_lane_f32(svfloat32_t data, uint32_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_f32,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_lane_f64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.tbl.nxv2f64(<vscale x 2 x double> [[DATA:%.*]], <vscale x 2 x i64> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z19test_svdup_lane_f64u13__SVFloat64_tm( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[INDEX:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.tbl.nxv2f64(<vscale x 2 x double> [[DATA:%.*]], <vscale x 2 x i64> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]] |
| // |
| svfloat64_t test_svdup_lane_f64(svfloat64_t data, uint64_t index) |
| { |
| return SVE_ACLE_FUNC(svdup_lane,_f64,,)(data, index); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_b8( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i1> poison, i1 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i1> [[DOTSPLATINSERT]], <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z15test_svdup_n_b8b( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i1> poison, i1 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 16 x i1> [[DOTSPLATINSERT]], <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] |
| // |
| svbool_t test_svdup_n_b8(bool op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_b8,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_b16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i1> poison, i1 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i1> [[DOTSPLATINSERT]], <vscale x 8 x i1> poison, <vscale x 8 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_b16b( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i1> poison, i1 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x i1> [[DOTSPLATINSERT]], <vscale x 8 x i1> poison, <vscale x 8 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svdup_n_b16(bool op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_b16,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_b32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i1> poison, i1 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i1> [[DOTSPLATINSERT]], <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_b32b( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i1> poison, i1 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 4 x i1> [[DOTSPLATINSERT]], <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svdup_n_b32(bool op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_b32,)(op); |
| } |
| |
| // CHECK-LABEL: @test_svdup_n_b64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i1> poison, i1 [[OP:%.*]], i32 0 |
| // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i1> [[DOTSPLATINSERT]], <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z16test_svdup_n_b64b( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i1> poison, i1 [[OP:%.*]], i32 0 |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 2 x i1> [[DOTSPLATINSERT]], <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svdup_n_b64(bool op) |
| { |
| return SVE_ACLE_FUNC(svdup,_n,_b64,)(op); |
| } |
