| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 |
| # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -run-pass=register-coalescer -verify-coalescing -o - %s | FileCheck %s |
| |
| # Test coalescing situations which can use av_* registers to handle |
| # copies between VGPRs and AGPRs. |
| |
| # Should coalesce %0 and %1 into subregisters of the av_64 common |
| # class |
| --- |
| name: copy_vgpr32_to_areg64_coalesce_with_av64 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_coalesce_with_av64 |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| undef %2.sub0:areg_64 = COPY %0 |
| %2.sub1:areg_64 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2 |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| undef %2.sub0:areg_64_align2 = COPY %0 |
| %2.sub1:areg_64_align2 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96 |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub1:areg_96 = COPY [[COPY1]] |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub2:areg_96 = COPY [[COPY2]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY3]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| %2:vgpr_32 = COPY $vgpr2 |
| undef %3.sub0:areg_96 = COPY %0 |
| %3.sub1:areg_96 = COPY %1 |
| %3.sub2:areg_96 = COPY %2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_align2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_align2 |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY2]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, [[COPY3]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| %2:vgpr_32 = COPY $vgpr2 |
| undef %3.sub0:areg_96_align2 = COPY %0 |
| %3.sub1:areg_96_align2 = COPY %1 |
| %3.sub2:areg_96_align2 = COPY %2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_coalesce_with_av128 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_coalesce_with_av128 |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2_sub3:areg_128 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %1:vreg_64 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128 = COPY %0 |
| %2.sub2_sub3:areg_128 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2 |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2_sub3:areg_128_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %1:vreg_64 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128_align2 = COPY %0 |
| %2.sub2_sub3:areg_128_align2 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_sgpr32_to_areg64_align2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $sgpr8, $sgpr9 |
| |
| ; CHECK-LABEL: name: copy_sgpr32_to_areg64_align2 |
| ; CHECK: liveins: $sgpr8, $sgpr9 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr8 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr9 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:sgpr_32 = COPY $sgpr8 |
| %1:sgpr_32 = COPY $sgpr9 |
| undef %2.sub0:areg_64_align2 = COPY %0 |
| %2.sub1:areg_64_align2 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96 |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96 = COPY %0 |
| %2.sub1_sub2:areg_96 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2 |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1_sub2:areg_96_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96_align2 = COPY %0 |
| %2.sub1_sub2:areg_96_align2 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96 |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2:areg_96 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %1:vgpr_32 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96 = COPY %0 |
| %2.sub2:areg_96 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2 |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %1:vgpr_32 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96_align2 = COPY %0 |
| %2.sub2:areg_96_align2 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x2_to_areg64 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x2_to_areg64 |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %2.sub0:areg_64 = COPY %0 |
| %2.sub1:areg_64 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x2_to_areg64_coalesce_with_av64_align2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x2_to_areg64_coalesce_with_av64_align2 |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| undef %2.sub0:areg_64_align2 = COPY %0 |
| %2.sub1:areg_64_align2 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x3_to_areg96 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x3_to_areg96 |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_96 = COPY %0 |
| %1.sub1:areg_96 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x3_to_areg96_align2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x3_to_areg96_align2 |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_96_align2 = COPY %0 |
| %1.sub1:areg_96_align2 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x4_to_areg128 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x4_to_areg128 |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_128 = COPY %0 |
| %1.sub1:areg_128 = COPY %0 |
| %1.sub2:areg_128 = COPY %0 |
| %1.sub3:areg_128 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, killed %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x4_to_areg128_align2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x4_to_areg128_align2 |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_128_align2 = COPY %0 |
| %1.sub1:areg_128_align2 = COPY %0 |
| %1.sub2:areg_128_align2 = COPY %0 |
| %1.sub3:areg_128_align2 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_coalesce_with_av64_other_v_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_coalesce_with_av64_other_v_use |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, [[COPY2]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| undef %2.sub0:areg_64 = COPY %0 |
| %2.sub1:areg_64 = COPY %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, killed %2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 2228233 /* reguse:VGPR_32 */, killed %0 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x2_to_areg64_coalesce_with_av64_other_v_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x2_to_areg64_coalesce_with_av64_other_v_use |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_64 = COPY %0 |
| %1.sub1:areg_64 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, killed %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 2228233 /* reguse:VGPR_32 */, killed %0 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x2_to_areg64_and_vreg64_coalesce_with_av64_other_v_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x2_to_areg64_and_vreg64_coalesce_with_av64_other_v_use |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:VReg_64 */, [[COPY]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_64 = COPY %0 |
| %1.sub1:areg_64 = COPY %0 |
| undef %2.sub0:vreg_64 = COPY %0 |
| %2.sub1:vreg_64 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, killed %1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:VReg_64 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| # Should coalesce %0 and %1 into subregisters of the av_64 common |
| # class |
| --- |
| name: copy_vgpr32_to_areg64_coalesce_with_av64_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_coalesce_with_av64_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| %0.sub1:vreg_64 = COPY $vgpr1 |
| undef %2.sub0:areg_64 = COPY %0.sub0 |
| %2.sub1:areg_64 = COPY %0.sub1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| %0.sub1:vreg_64 = COPY $vgpr1 |
| undef %2.sub0:areg_64_align2 = COPY %0.sub0 |
| %2.sub1:areg_64_align2 = COPY %0.sub1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_96 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 =COPY $vgpr0 |
| %0.sub1:vreg_96 = COPY $vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %3.sub0:areg_96 = COPY %0.sub0 |
| %3.sub1:areg_96 = COPY %0.sub1 |
| %3.sub2:areg_96 = COPY %0.sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_96 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 =COPY $vgpr0 |
| %0.sub1:vreg_96 = COPY $vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %3.sub0:areg_96_align2 = COPY %0.sub0 |
| %3.sub1:areg_96_align2 = COPY %0.sub1 |
| %3.sub2:areg_96_align2 = COPY %0.sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_coalesce_with_av128_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_coalesce_with_av128_sub |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_128 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128 = COPY [[COPY]].sub2_sub3 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_128 =COPY $vgpr0_vgpr1 |
| %0.sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128 = COPY %0.sub0_sub1 |
| %2.sub2_sub3:areg_128 = COPY %0.sub2_sub3 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| |
| |
| --- |
| name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_sub |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_128 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_128 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_128 =COPY $vgpr0_vgpr1 |
| %0.sub1:vreg_128 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128_align2 = COPY %0.sub0 |
| %2.sub2_sub3:areg_128_align2 = COPY %0.sub1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_sgpr32_to_areg64_align2_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $sgpr8, $sgpr9 |
| |
| ; CHECK-LABEL: name: copy_sgpr32_to_areg64_align2_sub |
| ; CHECK: liveins: $sgpr8, $sgpr9 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:sreg_64 = COPY $sgpr8 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:sreg_64 = COPY $sgpr9 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:sreg_64 = COPY $sgpr8 |
| %0.sub1:sreg_64 = COPY $sgpr9 |
| undef %2.sub0:areg_64_align2 = COPY %0.sub0 |
| %2.sub1:areg_64_align2 = COPY %0.sub1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY]].sub1_sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 =COPY $vgpr0 |
| %0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96 = COPY %0.sub0 |
| %2.sub1_sub2:areg_96 = COPY %0.sub1_sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96_align2 = COPY [[COPY]].sub1_sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 =COPY $vgpr0 |
| %0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96_align2 = COPY %0.sub0 |
| %2.sub1_sub2:areg_96_align2 = COPY %0.sub1_sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_sub |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96 = COPY %0.sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96_align2 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96_align2 = COPY %0.sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x2_to_areg64_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x2_to_areg64_sub |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %2.sub0:areg_64 = COPY %0.sub0 |
| %2.sub1:areg_64 = COPY %0.sub0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x3_to_areg96_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x3_to_areg96_sub |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %1.sub0:areg_96 = COPY %0.sub0 |
| %1.sub1:areg_96 = COPY %0.sub0 |
| %1.sub2:areg_96 = COPY %0.sub0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x3_to_areg96_align2_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x3_to_areg96_align2_sub |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %1.sub0:areg_96_align2 = COPY %0.sub0 |
| %1.sub1:areg_96_align2 = COPY %0.sub0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x4_to_areg128_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x4_to_areg128_sub |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_128 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %1.sub0:areg_128 = COPY %0.sub0 |
| %1.sub1:areg_128 = COPY %0.sub0 |
| %1.sub2:areg_128 = COPY %0.sub0 |
| %1.sub3:areg_128 = COPY %0.sub0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, killed %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x4_to_areg128_align2_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x4_to_areg128_align2_sub |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_128_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %1.sub0:areg_128_align2 = COPY %0.sub0 |
| %1.sub1:areg_128_align2 = COPY %0.sub0 |
| %1.sub2:areg_128_align2 = COPY %0.sub0 |
| %1.sub3:areg_128_align2 = COPY %0.sub0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_coalesce_with_av64_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_coalesce_with_av64_both_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| %0.sub1:vreg_64 = COPY $vgpr1 |
| undef %2.sub0:areg_64 = COPY %0.sub0 |
| %2.sub1:areg_64 = COPY %0.sub1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_both_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64_align2 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64_align2 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64_align2 = COPY $vgpr0 |
| %0.sub1:vreg_64_align2 = COPY $vgpr1 |
| undef %2.sub0:areg_64_align2 = COPY %0.sub0 |
| %2.sub1:areg_64_align2 = COPY %0.sub1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_both_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_96 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 = COPY $vgpr0 |
| %0.sub1:vreg_96 = COPY $vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %3.sub0:areg_96 = COPY %0.sub0 |
| %3.sub1:areg_96 = COPY %0.sub1 |
| %3.sub2:areg_96 = COPY %0.sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_both_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96_align2 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_96_align2 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96_align2 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96_align2 = COPY $vgpr0 |
| %0.sub1:vreg_96_align2 = COPY $vgpr1 |
| %0.sub2:vreg_96_align2 = COPY $vgpr2 |
| undef %3.sub0:areg_96_align2 = COPY %0.sub0 |
| %3.sub1:areg_96_align2 = COPY %0.sub1 |
| %3.sub2:areg_96_align2 = COPY %0.sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_coalesce_with_av128_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_coalesce_with_av128_both_sub |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_128 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128 = COPY [[COPY]].sub2_sub3 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_128 = COPY $vgpr0_vgpr1 |
| %0.sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128 = COPY %0.sub0_sub1 |
| %2.sub2_sub3:areg_128 = COPY %0.sub2_sub3 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_both_sub |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_128_align2 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128_align2 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128_align2 = COPY [[COPY]].sub2_sub3 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_128_align2 = COPY $vgpr0_vgpr1 |
| %0.sub2_sub3:vreg_128_align2 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128_align2 = COPY %0.sub0_sub1 |
| %2.sub2_sub3:areg_128_align2 = COPY %0.sub2_sub3 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_sgpr32_to_areg64_align2_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $sgpr8, $sgpr9 |
| |
| ; CHECK-LABEL: name: copy_sgpr32_to_areg64_align2_both_sub |
| ; CHECK: liveins: $sgpr8, $sgpr9 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:sreg_64 = COPY $sgpr8 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:sreg_64 = COPY $sgpr9 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:sreg_64 = COPY $sgpr8 |
| %0.sub1:sreg_64 = COPY $sgpr9 |
| undef %2.sub0:areg_64_align2 = COPY %0.sub0 |
| %2.sub1:areg_64_align2 = COPY %0.sub1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_both_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY]].sub1_sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 = COPY $vgpr0 |
| %0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96 = COPY %0.sub0 |
| %2.sub1_sub2:areg_96 = COPY %0.sub1_sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_shuffle_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96 |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY1]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 = COPY $vgpr0 |
| %0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96 = COPY %0.sub2 |
| %2.sub1_sub2:areg_96 = COPY %0.sub0_sub1 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_both_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96_align2 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96_align2 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96_align2 = COPY [[COPY]].sub1_sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96_align2 = COPY $vgpr0 |
| %0.sub1_sub2:vreg_96_align2 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96_align2 = COPY %0.sub0 |
| %2.sub1_sub2:areg_96_align2 = COPY %0.sub1_sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_both_sub |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96 = COPY %0.sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_both_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96_align2 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96_align2 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96_align2 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96_align2 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96_align2 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96_align2 = COPY %0.sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_mismatch_both_sub |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_mismatch_both_sub |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96_align2 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96_align2 = COPY %0.sub2 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_coalesce_with_av64_whole_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_coalesce_with_av64_whole_reg |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %2:areg_64 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3473417 /* reguse:AReg_64 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_whole_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_whole_reg |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| %2:areg_64_align2 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_whole_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_whole_reg |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 |
| %3:areg_96 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4587529 /* reguse:AReg_96 */, %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_whole_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_whole_reg |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96_align2 = COPY $vgpr0_vgpr1_vgpr2 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_96_align2 = COPY $vgpr0_vgpr1_vgpr2 |
| %3:areg_96_align2 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 4915209 /* reguse:AReg_96_Align2 */, %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_coalesce_with_av128_whole_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_coalesce_with_av128_whole_reg |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| %2:areg_128 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6029321 /* reguse:AReg_128 */, killed %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_whole_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_whole_reg |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| %2:areg_128_align2 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 6291465 /* reguse:AReg_128_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_sgpr32_to_areg64_align2_whole_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $sgpr8, $sgpr9 |
| |
| ; CHECK-LABEL: name: copy_sgpr32_to_areg64_align2_whole_reg |
| ; CHECK: liveins: $sgpr8, $sgpr9 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr8_sgpr9 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:sreg_64 = COPY $sgpr8_sgpr9 |
| %2:areg_64_align2 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_mismatch_whole_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_mismatch_whole_reg |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 |
| %2:areg_96_align2 = COPY %0 |
| INLINEASM &"; use $0", 0 /* attdialect */, 3735561 /* reguse:AReg_64_Align2 */, %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_coalesce_with_av64_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_coalesce_with_av64_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| undef %2.sub0:areg_64 = COPY %0 |
| %2.sub1:areg_64 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| undef %2.sub0:areg_64_align2 = COPY %0 |
| %2.sub1:areg_64_align2 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub1:areg_96 = COPY [[COPY1]] |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub2:areg_96 = COPY [[COPY2]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY3]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| %2:vgpr_32 = COPY $vgpr2 |
| undef %3.sub0:areg_96 = COPY %0 |
| %3.sub1:areg_96 = COPY %1 |
| %3.sub2:areg_96 = COPY %2 |
| S_NOP 0, implicit %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY2]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY3]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| %2:vgpr_32 = COPY $vgpr2 |
| undef %3.sub0:areg_96_align2 = COPY %0 |
| %3.sub1:areg_96_align2 = COPY %1 |
| %3.sub2:areg_96_align2 = COPY %2 |
| S_NOP 0, implicit %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_coalesce_with_av128_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_coalesce_with_av128_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2_sub3:areg_128 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %1:vreg_64 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128 = COPY %0 |
| %2.sub2_sub3:areg_128 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2_sub3:areg_128_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %1:vreg_64 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128_align2 = COPY %0 |
| %2.sub2_sub3:areg_128_align2 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_sgpr32_to_areg64_align2_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $sgpr8, $sgpr9 |
| |
| ; CHECK-LABEL: name: copy_sgpr32_to_areg64_align2_snop |
| ; CHECK: liveins: $sgpr8, $sgpr9 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr8 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr9 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:sgpr_32 = COPY $sgpr8 |
| %1:sgpr_32 = COPY $sgpr9 |
| undef %2.sub0:areg_64_align2 = COPY %0 |
| %2.sub1:areg_64_align2 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96 = COPY %0 |
| %2.sub1_sub2:areg_96 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1_sub2:areg_96_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96_align2 = COPY %0 |
| %2.sub1_sub2:areg_96_align2 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2:areg_96 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %1:vgpr_32 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96 = COPY %0 |
| %2.sub2:areg_96 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %1:vgpr_32 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96_align2 = COPY %0 |
| %2.sub2:areg_96_align2 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x2_to_areg64_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x2_to_areg64_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %2.sub0:areg_64 = COPY %0 |
| %2.sub1:areg_64 = COPY %0 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x2_to_areg64_coalesce_with_av64_align2_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x2_to_areg64_coalesce_with_av64_align2_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY1]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY2]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vgpr_32 = COPY $vgpr1 |
| undef %2.sub0:areg_64_align2 = COPY %0 |
| %2.sub1:areg_64_align2 = COPY %1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x3_to_areg96_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x3_to_areg96_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_96 = COPY %0 |
| %1.sub1:areg_96 = COPY %0 |
| S_NOP 0, implicit %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x3_to_areg96_align2_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x3_to_areg96_align2_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_96_align2 = COPY %0 |
| %1.sub1:areg_96_align2 = COPY %0 |
| S_NOP 0, implicit %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x4_to_areg128_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x4_to_areg128_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_128 = COPY %0 |
| %1.sub1:areg_128 = COPY %0 |
| %1.sub2:areg_128 = COPY %0 |
| %1.sub3:areg_128 = COPY %0 |
| S_NOP 0, implicit %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x4_to_areg128_align2_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x4_to_areg128_align2_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vgpr_32 = COPY $vgpr0 |
| undef %1.sub0:areg_128_align2 = COPY %0 |
| %1.sub1:areg_128_align2 = COPY %0 |
| %1.sub2:areg_128_align2 = COPY %0 |
| %1.sub3:areg_128_align2 = COPY %0 |
| S_NOP 0, implicit %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_coalesce_with_av64_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_coalesce_with_av64_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| %0.sub1:vreg_64 = COPY $vgpr1 |
| undef %2.sub0:areg_64 = COPY %0.sub0 |
| %2.sub1:areg_64 = COPY %0.sub1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| %0.sub1:vreg_64 = COPY $vgpr1 |
| undef %2.sub0:areg_64_align2 = COPY %0.sub0 |
| %2.sub1:areg_64_align2 = COPY %0.sub1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_96 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 =COPY $vgpr0 |
| %0.sub1:vreg_96 = COPY $vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %3.sub0:areg_96 = COPY %0.sub0 |
| %3.sub1:areg_96 = COPY %0.sub1 |
| %3.sub2:areg_96 = COPY %0.sub2 |
| S_NOP 0, implicit %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_96 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 =COPY $vgpr0 |
| %0.sub1:vreg_96 = COPY $vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %3.sub0:areg_96_align2 = COPY %0.sub0 |
| %3.sub1:areg_96_align2 = COPY %0.sub1 |
| %3.sub2:areg_96_align2 = COPY %0.sub2 |
| S_NOP 0, implicit %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_coalesce_with_av128_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_coalesce_with_av128_sub_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_128 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128 = COPY [[COPY]].sub2_sub3 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_128 =COPY $vgpr0_vgpr1 |
| %0.sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128 = COPY %0.sub0_sub1 |
| %2.sub2_sub3:areg_128 = COPY %0.sub2_sub3 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| |
| |
| --- |
| name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_sub_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_128 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128_align2 = COPY [[COPY]].sub2_sub3 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_128 =COPY $vgpr0_vgpr1 |
| %0.sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128_align2 = COPY %0.sub0_sub1 |
| %2.sub2_sub3:areg_128_align2 = COPY %0.sub2_sub3 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_sgpr32_to_areg64_align2_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $sgpr8, $sgpr9 |
| |
| ; CHECK-LABEL: name: copy_sgpr32_to_areg64_align2_sub_snop |
| ; CHECK: liveins: $sgpr8, $sgpr9 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:sreg_64 = COPY $sgpr8 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:sreg_64 = COPY $sgpr9 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:sreg_64 = COPY $sgpr8 |
| %0.sub1:sreg_64 = COPY $sgpr9 |
| undef %2.sub0:areg_64_align2 = COPY %0.sub0 |
| %2.sub1:areg_64_align2 = COPY %0.sub1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY]].sub1_sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 =COPY $vgpr0 |
| %0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96 = COPY %0.sub0 |
| %2.sub1_sub2:areg_96 = COPY %0.sub1_sub2 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96_align2 = COPY [[COPY]].sub1_sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 =COPY $vgpr0 |
| %0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96_align2 = COPY %0.sub0 |
| %2.sub1_sub2:areg_96_align2 = COPY %0.sub1_sub2 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_sub_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96 = COPY %0.sub2 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96_align2 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96_align2 = COPY %0.sub2 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x2_to_areg64_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x2_to_areg64_sub_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %2.sub0:areg_64 = COPY %0.sub0 |
| %2.sub1:areg_64 = COPY %0.sub0 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x3_to_areg96_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x3_to_areg96_sub_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %1.sub0:areg_96 = COPY %0.sub0 |
| %1.sub1:areg_96 = COPY %0.sub0 |
| %1.sub2:areg_96 = COPY %0.sub0 |
| S_NOP 0, implicit %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x3_to_areg96_align2_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x3_to_areg96_align2_sub_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %1.sub0:areg_96_align2 = COPY %0.sub0 |
| %1.sub1:areg_96_align2 = COPY %0.sub0 |
| S_NOP 0, implicit %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x4_to_areg128_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x4_to_areg128_sub_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_128 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %1.sub0:areg_128 = COPY %0.sub0 |
| %1.sub1:areg_128 = COPY %0.sub0 |
| %1.sub2:areg_128 = COPY %0.sub0 |
| %1.sub3:areg_128 = COPY %0.sub0 |
| S_NOP 0, implicit %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_x4_to_areg128_align2_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_x4_to_areg128_align2_sub_snop |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_128_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| undef %1.sub0:areg_128_align2 = COPY %0.sub0 |
| %1.sub1:areg_128_align2 = COPY %0.sub0 |
| %1.sub2:areg_128_align2 = COPY %0.sub0 |
| %1.sub3:areg_128_align2 = COPY %0.sub0 |
| S_NOP 0, implicit %1 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_coalesce_with_av64_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_coalesce_with_av64_both_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64 = COPY $vgpr0 |
| %0.sub1:vreg_64 = COPY $vgpr1 |
| undef %2.sub0:areg_64 = COPY %0.sub0 |
| %2.sub1:areg_64 = COPY %0.sub1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_both_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64_align2 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64_align2 = COPY $vgpr1 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_64_align2 = COPY $vgpr0 |
| %0.sub1:vreg_64_align2 = COPY $vgpr1 |
| undef %2.sub0:areg_64_align2 = COPY %0.sub0 |
| %2.sub1:areg_64_align2 = COPY %0.sub1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_both_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_96 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 = COPY $vgpr0 |
| %0.sub1:vreg_96 = COPY $vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %3.sub0:areg_96 = COPY %0.sub0 |
| %3.sub1:areg_96 = COPY %0.sub1 |
| %3.sub2:areg_96 = COPY %0.sub2 |
| S_NOP 0, implicit %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_both_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96_align2 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_96_align2 = COPY $vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96_align2 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96_align2 = COPY $vgpr0 |
| %0.sub1:vreg_96_align2 = COPY $vgpr1 |
| %0.sub2:vreg_96_align2 = COPY $vgpr2 |
| undef %3.sub0:areg_96_align2 = COPY %0.sub0 |
| %3.sub1:areg_96_align2 = COPY %0.sub1 |
| %3.sub2:areg_96_align2 = COPY %0.sub2 |
| S_NOP 0, implicit %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_coalesce_with_av128_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_coalesce_with_av128_both_sub_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_128 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128 = COPY [[COPY]].sub2_sub3 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_128 = COPY $vgpr0_vgpr1 |
| %0.sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128 = COPY %0.sub0_sub1 |
| %2.sub2_sub3:areg_128 = COPY %0.sub2_sub3 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_both_sub_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_128_align2 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128_align2 = COPY $vgpr2_vgpr3 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128_align2 = COPY [[COPY]].sub2_sub3 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_128_align2 = COPY $vgpr0_vgpr1 |
| %0.sub2_sub3:vreg_128_align2 = COPY $vgpr2_vgpr3 |
| undef %2.sub0_sub1:areg_128_align2 = COPY %0.sub0_sub1 |
| %2.sub2_sub3:areg_128_align2 = COPY %0.sub2_sub3 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_sgpr32_to_areg64_align2_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $sgpr8, $sgpr9 |
| |
| ; CHECK-LABEL: name: copy_sgpr32_to_areg64_align2_both_sub_snop |
| ; CHECK: liveins: $sgpr8, $sgpr9 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:sreg_64 = COPY $sgpr8 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:sreg_64 = COPY $sgpr9 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:sreg_64 = COPY $sgpr8 |
| %0.sub1:sreg_64 = COPY $sgpr9 |
| undef %2.sub0:areg_64_align2 = COPY %0.sub0 |
| %2.sub1:areg_64_align2 = COPY %0.sub1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_both_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY]].sub1_sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 = COPY $vgpr0 |
| %0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96 = COPY %0.sub0 |
| %2.sub1_sub2:areg_96 = COPY %0.sub1_sub2 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_shuffle_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96 |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: S_NOP 0, implicit %1 |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96 = COPY $vgpr0 |
| %0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96 = COPY %0.sub2 |
| %2.sub1_sub2:areg_96 = COPY %0.sub0_sub1 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| |
| --- |
| name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_vgpr64_to_areg96_coalesce_with_av96_align2_both_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96_align2 = COPY $vgpr0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96_align2 = COPY $vgpr1_vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96_align2 = COPY [[COPY]].sub1_sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0:vreg_96_align2 = COPY $vgpr0 |
| %0.sub1_sub2:vreg_96_align2 = COPY $vgpr1_vgpr2 |
| undef %2.sub0:areg_96_align2 = COPY %0.sub0 |
| %2.sub1_sub2:areg_96_align2 = COPY %0.sub1_sub2 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_both_sub_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96 = COPY %0.sub2 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_both_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96_align2 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96_align2 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96_align2 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96_align2 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96_align2 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96_align2 = COPY %0.sub2 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_mismatch_both_sub_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_mismatch_both_sub_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2 |
| ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]].sub0_sub1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2 |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1 |
| %0.sub2:vreg_96 = COPY $vgpr2 |
| undef %2.sub0_sub1:areg_96_align2 = COPY %0.sub0_sub1 |
| %2.sub2:areg_96_align2 = COPY %0.sub2 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| |
| --- |
| name: copy_vgpr32_to_areg64_coalesce_with_av64_whole_reg_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_coalesce_with_av64_whole_reg_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_64 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64 = COPY $vgpr0_vgpr1 |
| %2:areg_64 = COPY %0 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_whole_reg_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg64_align2_coalesce_with_av64_align2_whole_reg_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| %2:areg_64_align2 = COPY %0 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_whole_reg_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_whole_reg_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_96 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 |
| %3:areg_96 = COPY %0 |
| S_NOP 0, implicit %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_whole_reg_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr32_to_areg96_coalesce_with_av96_align2_whole_reg_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96_align2 = COPY $vgpr0_vgpr1_vgpr2 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_96_align2 = COPY $vgpr0_vgpr1_vgpr2 |
| %3:areg_96_align2 = COPY %0 |
| S_NOP 0, implicit %3 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_coalesce_with_av128_whole_reg_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_coalesce_with_av128_whole_reg_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_128 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| %2:areg_128 = COPY %0 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_whole_reg_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_to_areg64_align2_coalesce_with_av128_align2_whole_reg_snop |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_128_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| %2:areg_128_align2 = COPY %0 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_sgpr32_to_areg64_align2_whole_reg_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $sgpr8, $sgpr9 |
| |
| ; CHECK-LABEL: name: copy_sgpr32_to_areg64_align2_whole_reg_snop |
| ; CHECK: liveins: $sgpr8, $sgpr9 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr8_sgpr9 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_64_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:sreg_64 = COPY $sgpr8_sgpr9 |
| %2:areg_64_align2 = COPY %0 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
| |
| --- |
| name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_mismatch_whole_reg_snop |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1_vgpr2 |
| |
| ; CHECK-LABEL: name: copy_vgpr64_vgpr32_to_areg96_coalesce_with_av96_align2_mismatch_whole_reg_snop |
| ; CHECK: liveins: $vgpr0, $vgpr1_vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_96_align2 = COPY [[COPY]] |
| ; CHECK-NEXT: S_NOP 0, implicit [[COPY1]] |
| ; CHECK-NEXT: SI_RETURN |
| %0:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 |
| %2:areg_96_align2 = COPY %0 |
| S_NOP 0, implicit %2 |
| SI_RETURN |
| |
| ... |
