commit | f573d2e983e34a2f99a37976d4956e7aa7c62acd | [log] [tgz] |
---|---|---|
author | Gaëtan Bossu <gaetan.bossu@arm.com> | Fri Aug 01 11:32:58 2025 +0000 |
committer | Gaëtan Bossu <gaetan.bossu@arm.com> | Fri Aug 01 16:43:33 2025 +0000 |
tree | dc5102ed171608943b1993eec7ab168b588bb868 | |
parent | ebcb4929004ae3f08b2ca3d5d246f29aa73600e1 [diff] |
[AArch64][ISel] Select constructive SVE2 ext instruction This adds patterns for selecting EXT_ZZI_B. They are tested for fixed vectors using extract shuffles, and for scalable vectors using llvm.vector.splice intrinsics. We will get better codegen when enabling subreg liveness. Without it, any use of a zpr2 tuple is always considered as using both zpr registers of the pair.
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