| # RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -run-pass=none -filetype=null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" %s |
| |
| # 64-bit vsrc operands were not correctly diagnosed with unaligned registers. |
| |
| --- |
| name: uses_unaligned_physreg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr1_vgpr2 |
| |
| ; CHECK: *** Bad machine code: Subtarget requires even aligned vector registers *** |
| ; CHECK: - instruction: $vcc = V_CMP_NE_U64_e64 0, $vgpr1_vgpr2, implicit $exec |
| ; CHECK: *** Bad machine code: Illegal physical register for instruction *** |
| $vcc = V_CMP_NE_U64_e64 0, $vgpr1_vgpr2, implicit $exec |
| |
| ; CHECK: *** Bad machine code: Subtarget requires even aligned vector registers *** |
| ; CHECK: *** Bad machine code: Illegal physical register for instruction *** |
| ; CHECK: - instruction: V_CMP_NE_U64_e32 0, $vgpr1_vgpr2, implicit-def $vcc, implicit $exec |
| V_CMP_NE_U64_e32 0, $vgpr1_vgpr2, implicit-def $vcc, implicit $exec |
| |
| %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| %1:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| %2:vreg_64 = IMPLICIT_DEF |
| |
| ; CHECK: *** Bad machine code: Subtarget requires even aligned vector registers *** |
| ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** |
| %3:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 %0, %1, %2, 0, 0, 0, implicit $mode, implicit $exec |
| %4:vreg_64 = IMPLICIT_DEF |
| |
| ; CHECK: *** Bad machine code: Subtarget requires even aligned vector registers *** |
| ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** |
| %5:vreg_128_align2 = V_MFMA_F32_4X4X1F32_vgprcd_e64 %0, %1, %4, 0, 0, 0, implicit $mode, implicit $exec |
| ... |