llvm/test/CodeGen/RISCV/cmp-zilsd-csr.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=riscv32 -mattr=+zcmp -verify-machineinstrs < %s \
; RUN:   | FileCheck %s --check-prefix=ZCMP
; RUN: llc -mtriple=riscv32 -mattr=+zcmp,+zilsd -verify-machineinstrs < %s \
; RUN:   | FileCheck %s --check-prefix=ZCMP-ZILSD
; RUN: llc -mtriple=riscv32 -mattr=+xqccmp -verify-machineinstrs < %s \
; RUN:   | FileCheck %s --check-prefix=XQCCMP
; RUN: llc -mtriple=riscv32 -mattr=+xqccmp,+zilsd -verify-machineinstrs < %s \
; RUN:   | FileCheck %s --check-prefix=XQCCMP-ZILSD


declare i32 @foo()
declare void @bar()

define void @c_expand_asm_operands(ptr %p, i32 %a) optsize nounwind{
; ZCMP-LABEL: c_expand_asm_operands:
; ZCMP:       # %bb.0: # %entry
; ZCMP-NEXT:    cm.push {ra, s0-s2}, -16
; ZCMP-NEXT:    addi s0, sp, 16
; ZCMP-NEXT:    cm.mvsa01 s2, s1
; ZCMP-NEXT:    call foo
; ZCMP-NEXT:    addi s1, s1, 15
; ZCMP-NEXT:    andi s1, s1, -16
; ZCMP-NEXT:    sub a0, sp, s1
; ZCMP-NEXT:    mv sp, a0
; ZCMP-NEXT:    sw a0, 0(s2)
; ZCMP-NEXT:    addi sp, s0, -16
; ZCMP-NEXT:    cm.pop {ra, s0-s2}, 16
; ZCMP-NEXT:    tail bar
;
; ZCMP-ZILSD-LABEL: c_expand_asm_operands:
; ZCMP-ZILSD:       # %bb.0: # %entry
; ZCMP-ZILSD-NEXT:    cm.push {ra, s0-s2}, -16
; ZCMP-ZILSD-NEXT:    addi s0, sp, 16
; ZCMP-ZILSD-NEXT:    cm.mvsa01 s2, s1
; ZCMP-ZILSD-NEXT:    call foo
; ZCMP-ZILSD-NEXT:    addi s1, s1, 15
; ZCMP-ZILSD-NEXT:    andi s1, s1, -16
; ZCMP-ZILSD-NEXT:    sub a0, sp, s1
; ZCMP-ZILSD-NEXT:    mv sp, a0
; ZCMP-ZILSD-NEXT:    sw a0, 0(s2)
; ZCMP-ZILSD-NEXT:    addi sp, s0, -16
; ZCMP-ZILSD-NEXT:    cm.pop {ra, s0-s2}, 16
; ZCMP-ZILSD-NEXT:    tail bar
;
; XQCCMP-LABEL: c_expand_asm_operands:
; XQCCMP:       # %bb.0: # %entry
; XQCCMP-NEXT:    qc.cm.pushfp {ra, s0-s2}, -16
; XQCCMP-NEXT:    qc.cm.mvsa01 s2, s1
; XQCCMP-NEXT:    call foo
; XQCCMP-NEXT:    addi s1, s1, 15
; XQCCMP-NEXT:    andi s1, s1, -16
; XQCCMP-NEXT:    sub a0, sp, s1
; XQCCMP-NEXT:    mv sp, a0
; XQCCMP-NEXT:    sw a0, 0(s2)
; XQCCMP-NEXT:    addi sp, s0, -16
; XQCCMP-NEXT:    qc.cm.pop {ra, s0-s2}, 16
; XQCCMP-NEXT:    tail bar
;
; XQCCMP-ZILSD-LABEL: c_expand_asm_operands:
; XQCCMP-ZILSD:       # %bb.0: # %entry
; XQCCMP-ZILSD-NEXT:    qc.cm.pushfp {ra, s0-s2}, -16
; XQCCMP-ZILSD-NEXT:    qc.cm.mvsa01 s2, s1
; XQCCMP-ZILSD-NEXT:    call foo
; XQCCMP-ZILSD-NEXT:    addi s1, s1, 15
; XQCCMP-ZILSD-NEXT:    andi s1, s1, -16
; XQCCMP-ZILSD-NEXT:    sub a0, sp, s1
; XQCCMP-ZILSD-NEXT:    mv sp, a0
; XQCCMP-ZILSD-NEXT:    sw a0, 0(s2)
; XQCCMP-ZILSD-NEXT:    addi sp, s0, -16
; XQCCMP-ZILSD-NEXT:    qc.cm.pop {ra, s0-s2}, 16
; XQCCMP-ZILSD-NEXT:    tail bar
entry:
  %call1 = call i32 @foo()
  %0 = alloca i8, i32 %a, align 8
  store ptr %0, ptr %p, align 8
  tail call void @bar()
  ret void
}