llvm/test/CodeGen/PowerPC/ppc64-crsave.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -x mir -mcpu=pwr8 -mattr=-altivec \
# RUN: -run-pass=prologepilog --verify-machineinstrs %s -o - | \
# RUN: FileCheck %s --check-prefix=SAVEONE

# RUN: llc -mtriple powerpc64-unknown-linux-gnu -x mir -mcpu=pwr7 -mattr=-altivec \
# RUN: -run-pass=prologepilog --verify-machineinstrs %s -o - | \
# RUN: FileCheck %s --check-prefix=SAVEALL

# RUN: llc -mtriple powerpc64-unknown-aix-xcoff -x mir -mcpu=pwr4 -mattr=-altivec \
# RUN: -run-pass=prologepilog --verify-machineinstrs %s -o - | \
# RUN: FileCheck %s --check-prefix=SAVEALL

---
name:            CRAllSave
alignment:       16
tracksRegLiveness: true
liveins:
  - { reg: '$x3', virtual-reg: '' }
body:             |
  bb.0.entry:
    liveins: $x3
    ; SAVEONE-LABEL: name: CRAllSave
    ; SAVEONE: liveins: $x3, $cr2, $cr4
    ; SAVEONE-NEXT: {{  $}}
    ; SAVEONE-NEXT: $x12 = MFCR8 implicit killed $cr2, implicit killed $cr4
    ; SAVEONE-NEXT: STW8 killed $x12, 8, $x1
    ; SAVEONE-NEXT: renamable $x3 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
    ; SAVEONE-NEXT: renamable $cr2lt = COPY $cr0gt
    ; SAVEONE-NEXT: renamable $cr4lt = COPY $cr0gt
    ; SAVEONE-NEXT: $x12 = LWZ8 8, $x1
    ; SAVEONE-NEXT: $cr2 = MTOCRF8 $x12
    ; SAVEONE-NEXT: $cr4 = MTOCRF8 killed $x12
    ; SAVEONE-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
    ;
    ; SAVEALL-LABEL: name: CRAllSave
    ; SAVEALL: liveins: $x3, $cr2, $cr4
    ; SAVEALL-NEXT: {{  $}}
    ; SAVEALL-NEXT: $x12 = MFCR8 implicit killed $cr2, implicit killed $cr4
    ; SAVEALL-NEXT: STW8 killed $x12, 8, $x1
    ; SAVEALL-NEXT: renamable $x3 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
    ; SAVEALL-NEXT: renamable $cr2lt = COPY $cr0gt
    ; SAVEALL-NEXT: renamable $cr4lt = COPY $cr0gt
    ; SAVEALL-NEXT: $x12 = LWZ8 8, $x1
    ; SAVEALL-NEXT: $cr2 = MTOCRF8 $x12
    ; SAVEALL-NEXT: $cr4 = MTOCRF8 killed $x12
    ; SAVEALL-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
    renamable $x3 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
    renamable $cr2lt = COPY $cr0gt
    renamable $cr4lt = COPY $cr0gt
    BLR8 implicit $lr8, implicit $rm, implicit $x3





...
---
name:            CR2Save
alignment:       16
tracksRegLiveness: true
liveins:
  - { reg: '$x3', virtual-reg: '' }
body:             |
  bb.0.entry:
    liveins: $x3
    ; SAVEONE-LABEL: name: CR2Save
    ; SAVEONE: liveins: $x3, $cr2
    ; SAVEONE-NEXT: {{  $}}
    ; SAVEONE-NEXT: $x12 = MFOCRF8 killed $cr2
    ; SAVEONE-NEXT: STW8 killed $x12, 8, $x1
    ; SAVEONE-NEXT: renamable $x3 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
    ; SAVEONE-NEXT: renamable $cr2lt = COPY $cr0gt
    ; SAVEONE-NEXT: $x12 = LWZ8 8, $x1
    ; SAVEONE-NEXT: $cr2 = MTOCRF8 killed $x12
    ; SAVEONE-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
    ;
    ; SAVEALL-LABEL: name: CR2Save
    ; SAVEALL: liveins: $x3, $cr2
    ; SAVEALL-NEXT: {{  $}}
    ; SAVEALL-NEXT: $x12 = MFCR8 implicit killed $cr2
    ; SAVEALL-NEXT: STW8 killed $x12, 8, $x1
    ; SAVEALL-NEXT: renamable $x3 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
    ; SAVEALL-NEXT: renamable $cr2lt = COPY $cr0gt
    ; SAVEALL-NEXT: $x12 = LWZ8 8, $x1
    ; SAVEALL-NEXT: $cr2 = MTOCRF8 killed $x12
    ; SAVEALL-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
    renamable $x3 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
    renamable $cr2lt = COPY $cr0gt
    BLR8 implicit $lr8, implicit $rm, implicit $x3








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