llvm/test/CodeGen/MIR2Vec/Inputs/mir2vec_zero_vocab.json

{
    "Opcodes": {
        "ADD": [],
        "SUB": [],
        "MUL": [],
        "MOV": [],
        "CMP": [],
        "JMP": [],
        "CALL": [],
        "RET": []
    },
    "CommonOperands": {
        "Immediate": []
    },
    "PhysicalRegisters": {
        "GR32": []
    },
    "VirtualRegisters": {
        "GR32": []
    }
}