llvm/test/CodeGen/AMDGPU/spillv16Kernel.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa -mattr=+real-true16 -enable-misched=0 -post-RA-scheduler=0 -stress-regalloc=8 < %s | FileCheck %s -check-prefixes=GFX1250-TRUE16
; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa -mattr=-real-true16 -enable-misched=0 -post-RA-scheduler=0 -stress-regalloc=8 < %s | FileCheck %s -check-prefixes=GFX1250-FAKE16

define amdgpu_kernel void @spill_i16_alu() #0 {
; GFX1250-TRUE16-LABEL: spill_i16_alu:
; GFX1250-TRUE16:       ; %bb.0: ; %entry
; GFX1250-TRUE16-NEXT:    global_wb
; GFX1250-TRUE16-NEXT:    v_nop
; GFX1250-TRUE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-TRUE16-NEXT:    scratch_load_u16 v0, off, off scope:SCOPE_SYS
; GFX1250-TRUE16-NEXT:    s_wait_loadcnt 0x0
; GFX1250-TRUE16-NEXT:    v_add_nc_u16 v0.l, 0x7b, v0.l
; GFX1250-TRUE16-NEXT:    scratch_store_b16 off, v0, off offset:2 nv ; 2-byte Folded Spill
; GFX1250-TRUE16-NEXT:    s_wait_xcnt 0x0
; GFX1250-TRUE16-NEXT:    ;;#ASMSTART
; GFX1250-TRUE16-NEXT:    ;;#ASMEND
; GFX1250-TRUE16-NEXT:    scratch_load_u16 v1, off, off offset:2 th:TH_LOAD_LU nv ; 2-byte Folded Reload
; GFX1250-TRUE16-NEXT:    s_wait_loadcnt 0x0
; GFX1250-TRUE16-NEXT:    v_mov_b16_e32 v0.l, v1.l
; GFX1250-TRUE16-NEXT:    s_wait_xcnt 0x0
; GFX1250-TRUE16-NEXT:    scratch_store_b16 off, v0, off scope:SCOPE_SYS
; GFX1250-TRUE16-NEXT:    s_wait_storecnt 0x0
; GFX1250-TRUE16-NEXT:    s_endpgm
;
; GFX1250-FAKE16-LABEL: spill_i16_alu:
; GFX1250-FAKE16:       ; %bb.0: ; %entry
; GFX1250-FAKE16-NEXT:    global_wb
; GFX1250-FAKE16-NEXT:    v_nop
; GFX1250-FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-FAKE16-NEXT:    scratch_load_u16 v0, off, off scope:SCOPE_SYS
; GFX1250-FAKE16-NEXT:    s_wait_loadcnt 0x0
; GFX1250-FAKE16-NEXT:    v_add_nc_u16 v0, 0x7b, v0
; GFX1250-FAKE16-NEXT:    scratch_store_b32 off, v0, off offset:4 nv ; 4-byte Folded Spill
; GFX1250-FAKE16-NEXT:    s_wait_xcnt 0x0
; GFX1250-FAKE16-NEXT:    ;;#ASMSTART
; GFX1250-FAKE16-NEXT:    ;;#ASMEND
; GFX1250-FAKE16-NEXT:    scratch_load_b32 v0, off, off offset:4 th:TH_LOAD_LU nv ; 4-byte Folded Reload
; GFX1250-FAKE16-NEXT:    s_wait_xcnt 0x0
; GFX1250-FAKE16-NEXT:    s_wait_loadcnt 0x0
; GFX1250-FAKE16-NEXT:    scratch_store_b16 off, v0, off scope:SCOPE_SYS
; GFX1250-FAKE16-NEXT:    s_wait_storecnt 0x0
; GFX1250-FAKE16-NEXT:    s_endpgm
entry:
  %alloca = alloca i16, i32 1, align 4, addrspace(5)

  %aptr = getelementptr i16, ptr addrspace(5) %alloca, i32 0
  %a = load volatile i16, ptr addrspace(5) %aptr
  %add = add i16 %a, 123

  ; Force %a to spill.
  call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}" ()

  %outptr = getelementptr i16, ptr addrspace(5) %alloca, i32 0
  store volatile i16 %add, ptr addrspace(5) %outptr

  ret void
}

attributes #0 = { nounwind }