| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 |
| ; RUN: llc -mtriple=amdgpu9.50-amd-amdhsa < %s | FileCheck %s |
| |
| define amdgpu_kernel void @reduced_fabs_vector_truncate_crash(<2 x float> %0) { |
| ; CHECK-LABEL: reduced_fabs_vector_truncate_crash: |
| ; CHECK: ; %bb.0: |
| ; CHECK-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 |
| ; CHECK-NEXT: v_mov_b32_e32 v1, 0 |
| ; CHECK-NEXT: v_mov_b64_e32 v[2:3], 0 |
| ; CHECK-NEXT: s_waitcnt lgkmcnt(0) |
| ; CHECK-NEXT: s_bitset0_b32 s1, 31 |
| ; CHECK-NEXT: s_bitset0_b32 s0, 31 |
| ; CHECK-NEXT: v_mov_b32_e32 v0, s1 |
| ; CHECK-NEXT: v_cvt_pk_f16_f32 v0, s0, v0 |
| ; CHECK-NEXT: global_store_dwordx2 v[2:3], v[0:1], off |
| ; CHECK-NEXT: s_endpgm |
| %2 = fptrunc <2 x float> %0 to <2 x half> |
| %3 = shufflevector <2 x half> %2, <2 x half> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3> |
| %4 = tail call <4 x half> @llvm.fabs.v4f16(<4 x half> %3) |
| store <4 x half> %4, ptr addrspace(1) null, align 8 |
| ret void |
| } |