llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.offset-split.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs < %s | FileCheck --check-prefix=GFX8 %s
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1250 -amdgpu-enable-delay-alu=0 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX1250 %s

define amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__voffset67108860_soffset16(ptr addrspace(8) inreg %rsrc) {
; GFX8-LABEL: raw_ptr_buffer_load_f32__sgpr_rsrc__voffset67108860_soffset16:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_mov_b32 s0, s2
; GFX8-NEXT:    s_mov_b32 s1, s3
; GFX8-NEXT:    s_mov_b32 s2, s4
; GFX8-NEXT:    s_mov_b32 s3, s5
; GFX8-NEXT:    v_mov_b32_e32 v0, 0x3fff000
; GFX8-NEXT:    buffer_load_dword v0, v0, s[0:3], 16 offen offset:4092
; GFX8-NEXT:    s_waitcnt vmcnt(0)
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX1250-LABEL: raw_ptr_buffer_load_f32__sgpr_rsrc__voffset67108860_soffset16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0x3800000
; GFX1250-NEXT:    s_mov_b32 s0, s2
; GFX1250-NEXT:    s_mov_b32 s1, s3
; GFX1250-NEXT:    s_mov_b32 s2, s4
; GFX1250-NEXT:    s_mov_b32 s3, s5
; GFX1250-NEXT:    s_mov_b32 s4, 16
; GFX1250-NEXT:    buffer_load_b32 v0, v0, s[0:3], s4 offen offset:8388604
; GFX1250-NEXT:    s_wait_loadcnt 0x0
; GFX1250-NEXT:    ; return to shader part epilog
  %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 67108860, i32 16, i32 0)
  ret float %val
}

define amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__voffset67108860_soffset_neg16(ptr addrspace(8) inreg %rsrc) {
; GFX8-LABEL: raw_ptr_buffer_load_f32__sgpr_rsrc__voffset67108860_soffset_neg16:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_mov_b32 s0, s2
; GFX8-NEXT:    s_mov_b32 s1, s3
; GFX8-NEXT:    s_mov_b32 s2, s4
; GFX8-NEXT:    s_mov_b32 s3, s5
; GFX8-NEXT:    v_mov_b32_e32 v0, 0x3fff000
; GFX8-NEXT:    buffer_load_dword v0, v0, s[0:3], -16 offen offset:4092
; GFX8-NEXT:    s_waitcnt vmcnt(0)
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX1250-LABEL: raw_ptr_buffer_load_f32__sgpr_rsrc__voffset67108860_soffset_neg16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0x3800000
; GFX1250-NEXT:    s_mov_b32 s0, s2
; GFX1250-NEXT:    s_mov_b32 s1, s3
; GFX1250-NEXT:    s_mov_b32 s2, s4
; GFX1250-NEXT:    s_mov_b32 s3, s5
; GFX1250-NEXT:    s_mov_b32 s4, -16
; GFX1250-NEXT:    buffer_load_b32 v0, v0, s[0:3], s4 offen offset:8388604
; GFX1250-NEXT:    s_wait_loadcnt 0x0
; GFX1250-NEXT:    ; return to shader part epilog
  %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 67108860, i32 -16, i32 0)
  ret float %val
}

define amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__or67108860_soffset16(ptr addrspace(8) inreg %rsrc, i32 %voffset.base) {
; GFX8-LABEL: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__or67108860_soffset16:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    v_and_b32_e32 v0, 0xfc000000, v0
; GFX8-NEXT:    s_mov_b32 s0, s2
; GFX8-NEXT:    s_mov_b32 s1, s3
; GFX8-NEXT:    s_mov_b32 s2, s4
; GFX8-NEXT:    s_mov_b32 s3, s5
; GFX8-NEXT:    v_or_b32_e32 v0, 0x3fffffc, v0
; GFX8-NEXT:    buffer_load_dword v0, v0, s[0:3], 16 offen
; GFX8-NEXT:    s_waitcnt vmcnt(0)
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX1250-LABEL: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__or67108860_soffset16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    v_mov_b32_e32 v1, 0x3fffffc
; GFX1250-NEXT:    s_mov_b32 s0, s2
; GFX1250-NEXT:    s_mov_b32 s1, s3
; GFX1250-NEXT:    s_mov_b32 s2, s4
; GFX1250-NEXT:    s_mov_b32 s3, s5
; GFX1250-NEXT:    v_and_or_b32 v0, 0xfc000000, v0, v1
; GFX1250-NEXT:    s_mov_b32 s4, 16
; GFX1250-NEXT:    buffer_load_b32 v0, v0, s[0:3], s4 offen
; GFX1250-NEXT:    s_wait_loadcnt 0x0
; GFX1250-NEXT:    ; return to shader part epilog
  %voffset.masked = and i32 %voffset.base, -67108864
  %voffset = or disjoint i32 %voffset.masked, 67108860
  %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 16, i32 0)
  ret float %val
}

declare float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8), i32, i32, i32)