llvm/test/CodeGen/AArch64/trunc-avg-fold.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64-- -O2 -mattr=+neon < %s | FileCheck %s --check-prefixes=CHECK-SD
; RUN: llc -mtriple=aarch64-- -O2 -mattr=+neon -global-isel < %s | FileCheck %s --check-prefixes=CHECK-GI

define <8 x i8> @avgceil_u_i8_to_i16(<8 x i8> %a, <8 x i8> %b) {
; CHECK-SD-LABEL: avgceil_u_i8_to_i16:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    urhadd v0.8b, v0.8b, v1.8b
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: avgceil_u_i8_to_i16:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    ushll v0.8h, v0.8b, #0
; CHECK-GI-NEXT:    ushll v1.8h, v1.8b, #0
; CHECK-GI-NEXT:    urhadd v0.8h, v0.8h, v1.8h
; CHECK-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-GI-NEXT:    ret
  %a16 = zext <8 x i8> %a to <8 x i16>
  %b16 = zext <8 x i8> %b to <8 x i16>
  %avg16 = call <8 x i16> @llvm.aarch64.neon.urhadd.v8i16(<8 x i16> %a16, <8 x i16> %b16)
  %r = trunc <8 x i16> %avg16 to <8 x i8>
  ret <8 x i8> %r
}


define <8 x i8> @test_avgceil_s(<8 x i8> %a, <8 x i8> %b) {
; CHECK-SD-LABEL: test_avgceil_s:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    srhadd v0.8b, v0.8b, v1.8b
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: test_avgceil_s:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    sshll v0.8h, v0.8b, #0
; CHECK-GI-NEXT:    sshll v1.8h, v1.8b, #0
; CHECK-GI-NEXT:    srhadd v0.8h, v0.8h, v1.8h
; CHECK-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-GI-NEXT:    ret
  %a16 = sext <8 x i8> %a to <8 x i16>
  %b16 = sext <8 x i8> %b to <8 x i16>
  %avg16 = call <8 x i16> @llvm.aarch64.neon.srhadd.v8i16(<8 x i16> %a16, <8 x i16> %b16)
  %res  = trunc <8 x i16> %avg16 to <8 x i8>
  ret <8 x i8> %res
}

define <8 x i8> @avgfloor_u_i8_to_i16(<8 x i8> %a, <8 x i8> %b) {
; CHECK-SD-LABEL: avgfloor_u_i8_to_i16:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    uhadd v0.8b, v0.8b, v1.8b
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: avgfloor_u_i8_to_i16:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    ushll v0.8h, v0.8b, #0
; CHECK-GI-NEXT:    ushll v1.8h, v1.8b, #0
; CHECK-GI-NEXT:    uhadd v0.8h, v0.8h, v1.8h
; CHECK-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-GI-NEXT:    ret
  %a16 = zext  <8 x i8>  %a to <8 x i16>
  %b16 = zext  <8 x i8>  %b to <8 x i16>
  %avg16 = call <8 x i16> @llvm.aarch64.neon.uhadd.v8i16(<8 x i16> %a16, <8 x i16> %b16)
  %res = trunc <8 x i16> %avg16 to <8 x i8>
  ret <8 x i8> %res
}

define <8 x i8> @test_avgfloor_s(<8 x i8> %a, <8 x i8> %b) {
; CHECK-SD-LABEL: test_avgfloor_s:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    shadd v0.8b, v0.8b, v1.8b
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: test_avgfloor_s:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    sshll v0.8h, v0.8b, #0
; CHECK-GI-NEXT:    sshll v1.8h, v1.8b, #0
; CHECK-GI-NEXT:    shadd v0.8h, v0.8h, v1.8h
; CHECK-GI-NEXT:    xtn v0.8b, v0.8h
; CHECK-GI-NEXT:    ret
  %a16 = sext  <8 x i8>  %a to <8 x i16>
  %b16 = sext  <8 x i8>  %b to <8 x i16>
  %avg16 = call <8 x i16> @llvm.aarch64.neon.shadd.v8i16(<8 x i16> %a16, <8 x i16> %b16)
  %res  = trunc <8 x i16> %avg16 to <8 x i8>
  ret <8 x i8> %res
}