llvm/test/CodeGen/AArch64/sve2-fmmla-f16mf8.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+sve2,+f8f16mm < %s | FileCheck %s

define <vscale x 8 x half> @fmmla_f16mf8(<vscale x 8 x half> %acc, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b, i64 %fpmr) {
; CHECK-LABEL: fmmla_f16mf8:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmmla z0.h, z1.b, z2.b
; CHECK-NEXT:    ret
entry:
  %out = call <vscale x 8 x half> @llvm.aarch64.sve.fp8.fmmla.nxv8f16.nxv16i8(<vscale x 8 x half> %acc, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b)
  ret <vscale x 8 x half> %out
}