llvm/test/CodeGen/AArch64/mops-mmo-size.ll

; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+mops -stop-after=aarch64-isel -o - %s  | FileCheck %s --check-prefix=CHECK-SD
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+mops -global-isel -stop-after=finalize-isel -o - %s  | FileCheck %s --check-prefix=CHECK-GI

define void @test(ptr %out, ptr %in, i64 %a) {
  ; CHECK-SD-LABEL: name: test
  ; CHECK-SD: bb.0.entry:
  ; CHECK-SD-NEXT:   liveins: $x0, $x1, $x2
  ; CHECK-SD-NEXT: {{  $}}
  ; CHECK-SD-NEXT:   [[COPY:%[0-9]+]]:gpr64 = COPY $x2
  ; CHECK-SD-NEXT:   [[COPY1:%[0-9]+]]:gpr64common = COPY $x1
  ; CHECK-SD-NEXT:   [[COPY2:%[0-9]+]]:gpr64common = COPY $x0
  ; CHECK-SD-NEXT:   [[MOPSMemoryMovePseudo:%[0-9]+]]:gpr64common, [[MOPSMemoryMovePseudo1:%[0-9]+]]:gpr64common, [[MOPSMemoryMovePseudo2:%[0-9]+]]:gpr64 = MOPSMemoryMovePseudo [[COPY2]], [[COPY1]], [[COPY]], implicit-def dead $nzcv :: (store unknown-size into %ir.out, align 1), (load unknown-size from %ir.in, align 1)
  ; CHECK-SD-NEXT:   RET_ReallyLR
  ;
  ; CHECK-GI-LABEL: name: test
  ; CHECK-GI: bb.1.entry:
  ; CHECK-GI-NEXT:   liveins: $x0, $x1, $x2
  ; CHECK-GI-NEXT: {{  $}}
  ; CHECK-GI-NEXT:   [[COPY:%[0-9]+]]:gpr64common = COPY $x0
  ; CHECK-GI-NEXT:   [[COPY1:%[0-9]+]]:gpr64common = COPY $x1
  ; CHECK-GI-NEXT:   [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
  ; CHECK-GI-NEXT:   [[MOPSMemoryMovePseudo:%[0-9]+]]:gpr64common, [[MOPSMemoryMovePseudo1:%[0-9]+]]:gpr64common, [[MOPSMemoryMovePseudo2:%[0-9]+]]:gpr64 = MOPSMemoryMovePseudo [[COPY]], [[COPY1]], [[COPY2]], implicit-def dead $nzcv
  ; CHECK-GI-NEXT:   RET_ReallyLR
entry:
  call void @llvm.memmove.p0.p0.i64(ptr %out, ptr %in, i64 %a, i1 false)
  ret void
}