llvm/test/CodeGen/AArch64/atomic-vector-store.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -global-isel=0 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -global-isel=1 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI

define void @test_store_release_v1i8(ptr %ptr, <1 x i8> %data) nounwind {
; CHECK-LABEL: test_store_release_v1i8:
; CHECK:       // %bb.0:
; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NEXT:    umov w8, v0.b[0]
; CHECK-NEXT:    stlrb w8, [x0]
; CHECK-NEXT:    ret
  store atomic <1 x i8> %data, ptr %ptr release, align 1
  ret void
}

define void @test_store_monotonic_v1i16(ptr %ptr, <1 x i16> %data) nounwind {
; CHECK-SD-LABEL: test_store_monotonic_v1i16:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-SD-NEXT:    umov w8, v0.h[0]
; CHECK-SD-NEXT:    strh w8, [x0]
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: test_store_monotonic_v1i16:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    str h0, [x0]
; CHECK-GI-NEXT:    ret
  store atomic <1 x i16> %data, ptr %ptr monotonic, align 2
  ret void
}

define void @test_store_seq_cst_v1i32(ptr %ptr, <1 x i32> %data) nounwind {
; CHECK-SD-LABEL: test_store_seq_cst_v1i32:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-SD-NEXT:    fmov w8, s0
; CHECK-SD-NEXT:    stlr w8, [x0]
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: test_store_seq_cst_v1i32:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    fmov w8, s0
; CHECK-GI-NEXT:    stlr w8, [x0]
; CHECK-GI-NEXT:    ret
  store atomic <1 x i32> %data, ptr %ptr seq_cst, align 4
  ret void
}