llvm/test/CodeGen/X86/fptoui-sat-vector-512.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl       | FileCheck %s --check-prefixes=CHECK,AVX512F
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,AVX512

;
; 32-bit float to unsigned integer
;

define <16 x i1> @test_unsigned_v16i1_v16f32(<16 x float> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v16i1_v16f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vmaxss %xmm2, %xmm1, %xmm3
; AVX512F-NEXT:    vmovss {{.*#+}} xmm2 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %eax
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm3
; AVX512F-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm3
; AVX512F-NEXT:    vpinsrb $1, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $2, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $3, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $4, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $5, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $6, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $7, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $8, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $9, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $10, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $11, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $12, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $13, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $14, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm0
; AVX512F-NEXT:    vminss %xmm0, %xmm2, %xmm0
; AVX512F-NEXT:    vcvttss2si %xmm0, %eax
; AVX512F-NEXT:    vpinsrb $15, %eax, %xmm3, %xmm0
; AVX512F-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512F-NEXT:    vptestmd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %k1
; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v16i1_v16f32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]
; AVX512-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    vmaxss %xmm3, %xmm1, %xmm3
; AVX512-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512-NEXT:    vcvttss2si %xmm3, %eax
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm3
; AVX512-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512-NEXT:    vcvttss2si %xmm3, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm3
; AVX512-NEXT:    vpinsrb $1, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $2, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm0[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $3, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $4, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $5, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $6, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $7, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $8, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $9, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $10, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $11, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $12, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $13, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $14, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm0
; AVX512-NEXT:    vminss %xmm0, %xmm2, %xmm0
; AVX512-NEXT:    vcvttss2si %xmm0, %eax
; AVX512-NEXT:    vpinsrb $15, %eax, %xmm3, %xmm0
; AVX512-NEXT:    vptestmb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k0
; AVX512-NEXT:    vpmovm2b %k0, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
  %x = call <16 x i1> @llvm.fptoui.sat.v16i1.v16f32(<16 x float> %f)
  ret <16 x i1> %x
}

define <16 x i1> @test_freeze_unsigned_v16i1_v16f32(<16 x float> %f) nounwind {
; AVX512F-LABEL: test_freeze_unsigned_v16i1_v16f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vmaxss %xmm2, %xmm1, %xmm3
; AVX512F-NEXT:    vmovss {{.*#+}} xmm2 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %eax
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm3
; AVX512F-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm3
; AVX512F-NEXT:    vpinsrb $1, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $2, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $3, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $4, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $5, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $6, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $7, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $8, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $9, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $10, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $11, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $12, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $13, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $14, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm0
; AVX512F-NEXT:    vminss %xmm0, %xmm2, %xmm0
; AVX512F-NEXT:    vcvttss2si %xmm0, %eax
; AVX512F-NEXT:    vpinsrb $15, %eax, %xmm3, %xmm0
; AVX512F-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512F-NEXT:    vptestmd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %k1
; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_freeze_unsigned_v16i1_v16f32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]
; AVX512-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    vmaxss %xmm3, %xmm1, %xmm3
; AVX512-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512-NEXT:    vcvttss2si %xmm3, %eax
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm3
; AVX512-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512-NEXT:    vcvttss2si %xmm3, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm3
; AVX512-NEXT:    vpinsrb $1, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $2, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm0[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $3, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $4, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $5, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $6, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $7, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $8, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $9, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $10, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $11, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $12, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $13, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $14, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm0
; AVX512-NEXT:    vminss %xmm0, %xmm2, %xmm0
; AVX512-NEXT:    vcvttss2si %xmm0, %eax
; AVX512-NEXT:    vpinsrb $15, %eax, %xmm3, %xmm0
; AVX512-NEXT:    vptestmb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k0
; AVX512-NEXT:    vpmovm2b %k0, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
  %x = call <16 x i1> @llvm.fptoui.sat.v16i1.v16f32(<16 x float> %f)
  %y = freeze <16 x i1> %x
  ret <16 x i1> %y
}

define <16 x i8> @test_unsigned_v16i8_v16f32(<16 x float> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v16i8_v16f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vmaxss %xmm2, %xmm1, %xmm3
; AVX512F-NEXT:    vmovss {{.*#+}} xmm2 = [2.55E+2,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %eax
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm3
; AVX512F-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm3
; AVX512F-NEXT:    vpinsrb $1, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $2, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $3, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $4, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $5, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $6, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $7, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $8, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $9, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $10, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $11, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $12, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $13, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $14, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm0
; AVX512F-NEXT:    vminss %xmm0, %xmm2, %xmm0
; AVX512F-NEXT:    vcvttss2si %xmm0, %eax
; AVX512F-NEXT:    vpinsrb $15, %eax, %xmm3, %xmm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v16i8_v16f32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
; AVX512-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vmaxss %xmm2, %xmm1, %xmm3
; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = [2.55E+2,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512-NEXT:    vcvttss2si %xmm3, %eax
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm3
; AVX512-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512-NEXT:    vcvttss2si %xmm3, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm3
; AVX512-NEXT:    vpinsrb $1, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $2, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm0[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $3, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $4, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $5, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $6, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $7, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $8, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $9, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $10, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $11, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $12, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $13, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm0[1,0]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $14, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm0
; AVX512-NEXT:    vminss %xmm0, %xmm2, %xmm0
; AVX512-NEXT:    vcvttss2si %xmm0, %eax
; AVX512-NEXT:    vpinsrb $15, %eax, %xmm3, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
  %x = call <16 x i8> @llvm.fptoui.sat.v16i8.v16f32(<16 x float> %f)
  ret <16 x i8> %x
}

define <16 x i16> @test_unsigned_v16i16_v16f32(<16 x float> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v16i16_v16f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm3[1,1,3,3]
; AVX512F-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vmaxss %xmm2, %xmm1, %xmm4
; AVX512F-NEXT:    vmovss {{.*#+}} xmm2 = [6.5535E+4,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vmaxss %xmm3, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm4
; AVX512F-NEXT:    vpinsrw $1, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $2, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm3, %xmm1, %xmm3
; AVX512F-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %eax
; AVX512F-NEXT:    vpinsrw $3, %eax, %xmm4, %xmm3
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm4
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $4, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $5, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $6, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrw $7, %eax, %xmm3, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm4
; AVX512F-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm4
; AVX512F-NEXT:    vpinsrw $1, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $2, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $3, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $4, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $5, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512F-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512F-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $6, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vmaxss %xmm0, %xmm1, %xmm0
; AVX512F-NEXT:    vminss %xmm0, %xmm2, %xmm0
; AVX512F-NEXT:    vcvttss2si %xmm0, %eax
; AVX512F-NEXT:    vpinsrw $7, %eax, %xmm4, %xmm0
; AVX512F-NEXT:    vinserti128 $1, %xmm3, %ymm0, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v16i16_v16f32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm3[1,1,3,3]
; AVX512-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = [6.5535E+4,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vmaxss %xmm3, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm4
; AVX512-NEXT:    vpinsrw $1, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $2, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm3, %xmm1, %xmm3
; AVX512-NEXT:    vminss %xmm3, %xmm2, %xmm3
; AVX512-NEXT:    vcvttss2si %xmm3, %eax
; AVX512-NEXT:    vpinsrw $3, %eax, %xmm4, %xmm3
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm4
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $4, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $5, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $6, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrw $7, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm4, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm4
; AVX512-NEXT:    vminss %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm4
; AVX512-NEXT:    vpinsrw $1, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $2, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $3, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $4, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $5, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512-NEXT:    vmaxss %xmm5, %xmm1, %xmm5
; AVX512-NEXT:    vminss %xmm5, %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $6, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512-NEXT:    vmaxss %xmm0, %xmm1, %xmm0
; AVX512-NEXT:    vminss %xmm0, %xmm2, %xmm0
; AVX512-NEXT:    vcvttss2si %xmm0, %eax
; AVX512-NEXT:    vpinsrw $7, %eax, %xmm4, %xmm0
; AVX512-NEXT:    vinserti128 $1, %xmm3, %ymm0, %ymm0
; AVX512-NEXT:    retq
  %x = call <16 x i16> @llvm.fptoui.sat.v16i16.v16f32(<16 x float> %f)
  ret <16 x i16> %x
}

define <16 x i32> @test_unsigned_v16i32_v16f32(<16 x float> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v16i32_v16f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm3
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm3[1,1,3,3]
; AVX512F-NEXT:    vcvttss2si %xmm4, %rdx
; AVX512F-NEXT:    xorl %eax, %eax
; AVX512F-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vucomiss %xmm1, %xmm4
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vmovss {{.*#+}} xmm2 = [4.29496704E+9,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vucomiss %xmm2, %xmm4
; AVX512F-NEXT:    movl $-1, %ecx
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vcvttss2si %xmm3, %rsi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm3[1,0]
; AVX512F-NEXT:    vcvttss2si %xmm4, %rdi
; AVX512F-NEXT:    vmovd %esi, %xmm5
; AVX512F-NEXT:    vucomiss %xmm1, %xmm4
; AVX512F-NEXT:    cmovbl %eax, %edi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm4
; AVX512F-NEXT:    cmoval %ecx, %edi
; AVX512F-NEXT:    vpinsrd $1, %edx, %xmm5, %xmm4
; AVX512F-NEXT:    vpinsrd $2, %edi, %xmm4, %xmm5
; AVX512F-NEXT:    vshufps {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX512F-NEXT:    vcvttss2si %xmm3, %rdx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm4[1,1,3,3]
; AVX512F-NEXT:    vcvttss2si %xmm3, %rsi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm5, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm4, %rdx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm4
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm4
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512F-NEXT:    vcvttss2si %xmm5, %rdi
; AVX512F-NEXT:    vmovd %edx, %xmm6
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %edi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %edi
; AVX512F-NEXT:    vpinsrd $1, %esi, %xmm6, %xmm5
; AVX512F-NEXT:    vpinsrd $2, %edi, %xmm5, %xmm6
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512F-NEXT:    vcvttss2si %xmm4, %rdx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm4
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm4
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm5
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm5[1,1,3,3]
; AVX512F-NEXT:    vcvttss2si %xmm4, %rsi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm4
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm4
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm6, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm5, %rdx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm6 = xmm5[1,0]
; AVX512F-NEXT:    vcvttss2si %xmm6, %rdi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm6
; AVX512F-NEXT:    cmovbl %eax, %edi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm6
; AVX512F-NEXT:    vmovd %edx, %xmm6
; AVX512F-NEXT:    cmoval %ecx, %edi
; AVX512F-NEXT:    vpinsrd $1, %esi, %xmm6, %xmm6
; AVX512F-NEXT:    vpinsrd $2, %edi, %xmm6, %xmm6
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm5[3,3,3,3]
; AVX512F-NEXT:    vcvttss2si %xmm5, %rdx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vcvttss2si %xmm5, %rsi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm6, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm0, %rdx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm6 = xmm0[1,0]
; AVX512F-NEXT:    vcvttss2si %xmm6, %rdi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm6
; AVX512F-NEXT:    cmovbl %eax, %edi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm6
; AVX512F-NEXT:    vmovd %edx, %xmm6
; AVX512F-NEXT:    cmoval %ecx, %edi
; AVX512F-NEXT:    vpinsrd $1, %esi, %xmm6, %xmm6
; AVX512F-NEXT:    vpinsrd $2, %edi, %xmm6, %xmm6
; AVX512F-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vcvttss2si %xmm0, %rdx
; AVX512F-NEXT:    vinserti128 $1, %xmm3, %ymm4, %ymm3
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm6, %xmm0
; AVX512F-NEXT:    vinserti128 $1, %xmm5, %ymm0, %ymm0
; AVX512F-NEXT:    vinserti64x4 $1, %ymm3, %zmm0, %zmm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v16i32_v16f32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm3[1,1,3,3]
; AVX512-NEXT:    vcvttss2si %xmm4, %rdx
; AVX512-NEXT:    xorl %eax, %eax
; AVX512-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vucomiss %xmm1, %xmm4
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = [4.29496704E+9,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    vucomiss %xmm2, %xmm4
; AVX512-NEXT:    movl $-1, %ecx
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vcvttss2si %xmm3, %rsi
; AVX512-NEXT:    vucomiss %xmm1, %xmm3
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm3
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovd %esi, %xmm4
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; AVX512-NEXT:    vcvttss2si %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $2, %edx, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX512-NEXT:    vcvttss2si %xmm3, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm3
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm3
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm4, %xmm3
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vcvttss2si %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vcvttss2si %xmm4, %rsi
; AVX512-NEXT:    vucomiss %xmm1, %xmm4
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm4
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovd %esi, %xmm5
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm5, %xmm5
; AVX512-NEXT:    vshufpd {{.*#+}} xmm6 = xmm4[1,0]
; AVX512-NEXT:    vcvttss2si %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $2, %edx, %xmm5, %xmm5
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX512-NEXT:    vcvttss2si %xmm4, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm4
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm4
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm5, %xmm4
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm5
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm5[1,1,3,3]
; AVX512-NEXT:    vcvttss2si %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vcvttss2si %xmm5, %rsi
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vshufpd {{.*#+}} xmm6 = xmm5[1,0]
; AVX512-NEXT:    vcvttss2si %xmm6, %rdi
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %edi
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    vmovd %esi, %xmm6
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm6, %xmm6
; AVX512-NEXT:    cmoval %ecx, %edi
; AVX512-NEXT:    vpinsrd $2, %edi, %xmm6, %xmm6
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm5[3,3,3,3]
; AVX512-NEXT:    vcvttss2si %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm6, %xmm5
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm0[1,1,3,3]
; AVX512-NEXT:    vcvttss2si %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vinserti128 $1, %xmm3, %ymm4, %ymm3
; AVX512-NEXT:    vcvttss2si %xmm0, %rsi
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovd %esi, %xmm4
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm6 = xmm0[1,0]
; AVX512-NEXT:    vcvttss2si %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $2, %edx, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX512-NEXT:    vcvttss2si %xmm0, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm4, %xmm0
; AVX512-NEXT:    vinserti128 $1, %xmm5, %ymm0, %ymm0
; AVX512-NEXT:    vinserti64x4 $1, %ymm3, %zmm0, %zmm0
; AVX512-NEXT:    retq
  %x = call <16 x i32> @llvm.fptoui.sat.v16i32.v16f32(<16 x float> %f)
  ret <16 x i32> %x
}

define <16 x i64> @test_unsigned_v16i64_v16f32(<16 x float> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v16i64_v16f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm4 = xmm3[3,3,3,3]
; AVX512F-NEXT:    vcvttss2usi %xmm4, %rdx
; AVX512F-NEXT:    xorl %eax, %eax
; AVX512F-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vucomiss %xmm1, %xmm4
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vmovss {{.*#+}} xmm2 = [1.8446743E+19,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vucomiss %xmm2, %xmm4
; AVX512F-NEXT:    movq $-1, %rcx
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm3[1,0]
; AVX512F-NEXT:    vcvttss2usi %xmm4, %rdi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm4
; AVX512F-NEXT:    cmovbq %rax, %rdi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm4
; AVX512F-NEXT:    cmovaq %rcx, %rdi
; AVX512F-NEXT:    vcvttss2usi %xmm3, %rsi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
; AVX512F-NEXT:    vcvttss2usi %xmm3, %r8
; AVX512F-NEXT:    vmovq %rdx, %xmm4
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbq %rax, %r8
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    cmovaq %rcx, %r8
; AVX512F-NEXT:    vmovq %rdi, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rdi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rdi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rdi
; AVX512F-NEXT:    vmovq %rsi, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rsi
; AVX512F-NEXT:    vmovq %r8, %xmm6
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm6[0]
; AVX512F-NEXT:    vinserti128 $1, %xmm3, %ymm4, %ymm4
; AVX512F-NEXT:    vcvttss2usi %xmm0, %rdx
; AVX512F-NEXT:    vmovq %rdi, %xmm6
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vmovq %rsi, %xmm7
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vcvttss2usi %xmm3, %rsi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vextractf64x4 $1, %zmm0, %ymm3
; AVX512F-NEXT:    vextractf128 $1, %ymm3, %xmm5
; AVX512F-NEXT:    vshufps {{.*#+}} xmm0 = xmm5[3,3,3,3]
; AVX512F-NEXT:    vcvttss2usi %xmm0, %rdi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm7[0],xmm6[0]
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbq %rax, %rdi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmovaq %rcx, %rdi
; AVX512F-NEXT:    vmovq %rdx, %xmm0
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm7 = xmm5[1,0]
; AVX512F-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm7
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm7
; AVX512F-NEXT:    vmovq %rsi, %xmm7
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm7[0]
; AVX512F-NEXT:    vinserti128 $1, %xmm6, %ymm0, %ymm0
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rsi
; AVX512F-NEXT:    vinserti64x4 $1, %ymm4, %zmm0, %zmm0
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovq %rdi, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm5[1,1,3,3]
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rdi
; AVX512F-NEXT:    vmovq %rdx, %xmm6
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rdi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rdi
; AVX512F-NEXT:    vmovq %rsi, %xmm5
; AVX512F-NEXT:    vshufps {{.*#+}} xmm7 = xmm3[3,3,3,3]
; AVX512F-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm4 = xmm6[0],xmm4[0]
; AVX512F-NEXT:    vucomiss %xmm1, %xmm7
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm7
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vmovq %rdi, %xmm6
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm7 = xmm3[1,0]
; AVX512F-NEXT:    vcvttss2usi %xmm7, %rsi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm6[0]
; AVX512F-NEXT:    vucomiss %xmm1, %xmm7
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm7
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vinserti128 $1, %xmm4, %ymm5, %ymm4
; AVX512F-NEXT:    vmovq %rdx, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm3, %rdx
; AVX512F-NEXT:    vmovq %rsi, %xmm6
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm6[0],xmm5[0]
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
; AVX512F-NEXT:    vcvttss2usi %xmm3, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm6
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovq %rsi, %xmm1
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm6[0],xmm1[0]
; AVX512F-NEXT:    vinserti128 $1, %xmm5, %ymm1, %ymm1
; AVX512F-NEXT:    vinserti64x4 $1, %ymm4, %zmm1, %zmm1
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v16i64_v16f32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm2[3,3,3,3]
; AVX512-NEXT:    vcvttss2usi %xmm4, %rdx
; AVX512-NEXT:    xorl %eax, %eax
; AVX512-NEXT:    vxorps %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vucomiss %xmm1, %xmm4
; AVX512-NEXT:    vmovss {{.*#+}} xmm3 = [1.8446743E+19,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm4
; AVX512-NEXT:    movq $-1, %rcx
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm2[1,0]
; AVX512-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vcvttss2usi %xmm2, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm5
; AVX512-NEXT:    vucomiss %xmm1, %xmm2
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomiss %xmm3, %xmm2
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm4 = xmm5[0],xmm4[0]
; AVX512-NEXT:    vmovq %rsi, %xmm5
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
; AVX512-NEXT:    vcvttss2usi %xmm2, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm2
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm2
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm2
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm2 = xmm5[0],xmm2[0]
; AVX512-NEXT:    vinserti128 $1, %xmm4, %ymm2, %ymm2
; AVX512-NEXT:    vshufps {{.*#+}} xmm4 = xmm0[3,3,3,3]
; AVX512-NEXT:    vcvttss2usi %xmm4, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm4
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm4
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vcvttss2usi %xmm0, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm5
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomiss %xmm3, %xmm0
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm4 = xmm5[0],xmm4[0]
; AVX512-NEXT:    vmovq %rsi, %xmm5
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm0[1,1,3,3]
; AVX512-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm6
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm6[0]
; AVX512-NEXT:    vinserti128 $1, %xmm4, %ymm5, %ymm4
; AVX512-NEXT:    vinserti64x4 $1, %ymm2, %zmm4, %zmm2
; AVX512-NEXT:    vextractf64x4 $1, %zmm0, %ymm0
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm4[3,3,3,3]
; AVX512-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vcvttss2usi %xmm5, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vmovq %rsi, %xmm5
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm6[0]
; AVX512-NEXT:    vcvttss2usi %xmm4, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm4
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm4
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm4[1,1,3,3]
; AVX512-NEXT:    vcvttss2usi %xmm4, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm4
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm4
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm4
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm4 = xmm6[0],xmm4[0]
; AVX512-NEXT:    vinserti128 $1, %xmm5, %ymm4, %ymm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512-NEXT:    vcvttss2usi %xmm5, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vmovq %rsi, %xmm5
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm6[0]
; AVX512-NEXT:    vcvttss2usi %xmm0, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm0
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX512-NEXT:    vcvttss2usi %xmm0, %rdx
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm0
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm0
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm6[0],xmm0[0]
; AVX512-NEXT:    vinserti128 $1, %xmm5, %ymm0, %ymm0
; AVX512-NEXT:    vinserti64x4 $1, %ymm4, %zmm0, %zmm1
; AVX512-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512-NEXT:    retq
  %x = call <16 x i64> @llvm.fptoui.sat.v16i64.v16f32(<16 x float> %f)
  ret <16 x i64> %x
}

define <16 x i128> @test_unsigned_v16i128_v16f32(<16 x float> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v16i128_v16f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    pushq %rbp
; AVX512F-NEXT:    pushq %r15
; AVX512F-NEXT:    pushq %r14
; AVX512F-NEXT:    pushq %r13
; AVX512F-NEXT:    pushq %r12
; AVX512F-NEXT:    pushq %rbx
; AVX512F-NEXT:    subq $360, %rsp # imm = 0x168
; AVX512F-NEXT:    vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512F-NEXT:    movq %rdi, %rbx
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    xorl %r13d, %r13d
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    movq $-1, %rbp
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,0]
; AVX512F-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,0]
; AVX512F-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    vextractf64x4 $1, %zmm0, %ymm0
; AVX512F-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,0]
; AVX512F-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilpd $1, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,0]
; AVX512F-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilps $255, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %rdx
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    movq %rdx, %r14
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %r14
; AVX512F-NEXT:    cmovbq %r13, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %rbp, %r14
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    movq %rax, %r15
; AVX512F-NEXT:    movq %rdx, %r12
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r13, %r12
; AVX512F-NEXT:    cmovbq %r13, %r15
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %rbp, %r15
; AVX512F-NEXT:    cmovaq %rbp, %r12
; AVX512F-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    movq %rax, %r13
; AVX512F-NEXT:    movq %rdx, %rbp
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    movl $0, %eax
; AVX512F-NEXT:    cmovbq %rax, %rbp
; AVX512F-NEXT:    cmovbq %rax, %r13
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    movq $-1, %rax
; AVX512F-NEXT:    cmovaq %rax, %r13
; AVX512F-NEXT:    cmovaq %rax, %rbp
; AVX512F-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    movl $0, %ecx
; AVX512F-NEXT:    cmovbq %rcx, %rdx
; AVX512F-NEXT:    cmovbq %rcx, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    movq $-1, %rcx
; AVX512F-NEXT:    cmovaq %rcx, %rax
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    movq %rdx, 200(%rbx)
; AVX512F-NEXT:    movq %rax, 192(%rbx)
; AVX512F-NEXT:    movq %rbp, 136(%rbx)
; AVX512F-NEXT:    movq %r13, 128(%rbx)
; AVX512F-NEXT:    movq %r12, 72(%rbx)
; AVX512F-NEXT:    movq %r15, 64(%rbx)
; AVX512F-NEXT:    movq %r14, 8(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, (%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 248(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 240(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 232(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 224(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 216(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 208(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 184(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 176(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 168(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 160(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 152(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 144(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 120(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 112(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 104(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 96(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 88(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 80(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 56(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 48(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 40(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 32(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 24(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 16(%rbx)
; AVX512F-NEXT:    movq %rbx, %rax
; AVX512F-NEXT:    addq $360, %rsp # imm = 0x168
; AVX512F-NEXT:    popq %rbx
; AVX512F-NEXT:    popq %r12
; AVX512F-NEXT:    popq %r13
; AVX512F-NEXT:    popq %r14
; AVX512F-NEXT:    popq %r15
; AVX512F-NEXT:    popq %rbp
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v16i128_v16f32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    pushq %rbp
; AVX512-NEXT:    pushq %r15
; AVX512-NEXT:    pushq %r14
; AVX512-NEXT:    pushq %r13
; AVX512-NEXT:    pushq %r12
; AVX512-NEXT:    pushq %rbx
; AVX512-NEXT:    subq $360, %rsp # imm = 0x168
; AVX512-NEXT:    vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT:    movq %rdi, %rbx
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    xorl %r13d, %r13d
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    movq $-1, %rbp
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,0]
; AVX512-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,0]
; AVX512-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT:    vextractf64x4 $1, %zmm0, %ymm0
; AVX512-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,0]
; AVX512-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilpd $1, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,0]
; AVX512-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilps $255, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %rdx
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    movq %rdx, %r14
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %r14
; AVX512-NEXT:    cmovbq %r13, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %rbp, %r14
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    movq %rax, %r15
; AVX512-NEXT:    movq %rdx, %r12
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r13, %r12
; AVX512-NEXT:    cmovbq %r13, %r15
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %rbp, %r15
; AVX512-NEXT:    cmovaq %rbp, %r12
; AVX512-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    movq %rax, %r13
; AVX512-NEXT:    movq %rdx, %rbp
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    movl $0, %eax
; AVX512-NEXT:    cmovbq %rax, %rbp
; AVX512-NEXT:    cmovbq %rax, %r13
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    movq $-1, %rax
; AVX512-NEXT:    cmovaq %rax, %r13
; AVX512-NEXT:    cmovaq %rax, %rbp
; AVX512-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    movl $0, %ecx
; AVX512-NEXT:    cmovbq %rcx, %rdx
; AVX512-NEXT:    cmovbq %rcx, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    movq $-1, %rcx
; AVX512-NEXT:    cmovaq %rcx, %rax
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    movq %rdx, 200(%rbx)
; AVX512-NEXT:    movq %rax, 192(%rbx)
; AVX512-NEXT:    movq %rbp, 136(%rbx)
; AVX512-NEXT:    movq %r13, 128(%rbx)
; AVX512-NEXT:    movq %r12, 72(%rbx)
; AVX512-NEXT:    movq %r15, 64(%rbx)
; AVX512-NEXT:    movq %r14, 8(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, (%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 248(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 240(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 232(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 224(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 216(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 208(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 184(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 176(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 168(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 160(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 152(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 144(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 120(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 112(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 104(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 96(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 88(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 80(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 56(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 48(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 40(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 32(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 24(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 16(%rbx)
; AVX512-NEXT:    movq %rbx, %rax
; AVX512-NEXT:    addq $360, %rsp # imm = 0x168
; AVX512-NEXT:    popq %rbx
; AVX512-NEXT:    popq %r12
; AVX512-NEXT:    popq %r13
; AVX512-NEXT:    popq %r14
; AVX512-NEXT:    popq %r15
; AVX512-NEXT:    popq %rbp
; AVX512-NEXT:    retq
  %x = call <16 x i128> @llvm.fptoui.sat.v16i128.v16f32(<16 x float> %f)
  ret <16 x i128> %x
}

;
; 64-bit float to unsigned integer
;

define <8 x i1> @test_unsigned_v8i1_v8f64(<8 x double> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v8i1_v8f64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm1 = xmm0[1,0]
; AVX512F-NEXT:    vxorpd %xmm2, %xmm2, %xmm2
; AVX512F-NEXT:    vmaxsd %xmm1, %xmm2, %xmm1
; AVX512F-NEXT:    vmovsd {{.*#+}} xmm3 = [1.0E+0,0.0E+0]
; AVX512F-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512F-NEXT:    vcvttsd2si %xmm1, %eax
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm2, %xmm1
; AVX512F-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512F-NEXT:    vcvttsd2si %xmm1, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm1
; AVX512F-NEXT:    vpinsrb $1, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512F-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512F-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $2, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512F-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $3, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512F-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512F-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $4, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512F-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $5, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm2, %xmm4
; AVX512F-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512F-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $6, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm2, %xmm0
; AVX512F-NEXT:    vminsd %xmm0, %xmm3, %xmm0
; AVX512F-NEXT:    vcvttsd2si %xmm0, %eax
; AVX512F-NEXT:    vpinsrb $7, %eax, %xmm1, %xmm0
; AVX512F-NEXT:    vpmovzxbq {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero,xmm0[5],zero,zero,zero,zero,zero,zero,zero,xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vptestmq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %k1
; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v8i1_v8f64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vshufpd {{.*#+}} xmm1 = xmm0[1,0]
; AVX512-NEXT:    vxorpd %xmm2, %xmm2, %xmm2
; AVX512-NEXT:    vmovsd {{.*#+}} xmm3 = [1.0E+0,0.0E+0]
; AVX512-NEXT:    vmaxsd %xmm1, %xmm2, %xmm1
; AVX512-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512-NEXT:    vcvttsd2si %xmm1, %eax
; AVX512-NEXT:    vmaxsd %xmm0, %xmm2, %xmm1
; AVX512-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512-NEXT:    vcvttsd2si %xmm1, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm1
; AVX512-NEXT:    vpinsrb $1, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $2, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $3, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $4, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $5, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512-NEXT:    vmaxsd %xmm0, %xmm2, %xmm4
; AVX512-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $6, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT:    vmaxsd %xmm0, %xmm2, %xmm0
; AVX512-NEXT:    vminsd %xmm0, %xmm3, %xmm0
; AVX512-NEXT:    vcvttsd2si %xmm0, %eax
; AVX512-NEXT:    vpinsrb $7, %eax, %xmm1, %xmm0
; AVX512-NEXT:    vpmovzxbq {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero,xmm0[5],zero,zero,zero,zero,zero,zero,zero,xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vptestmq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %k0
; AVX512-NEXT:    vpmovm2w %k0, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
  %x = call <8 x i1> @llvm.fptoui.sat.v8i1.v8f64(<8 x double> %f)
  ret <8 x i1> %x
}

define <8 x i8> @test_unsigned_v8i8_v8f64(<8 x double> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v8i8_v8f64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm1 = xmm0[1,0]
; AVX512F-NEXT:    vxorpd %xmm2, %xmm2, %xmm2
; AVX512F-NEXT:    vmaxsd %xmm1, %xmm2, %xmm1
; AVX512F-NEXT:    vmovsd {{.*#+}} xmm3 = [2.55E+2,0.0E+0]
; AVX512F-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512F-NEXT:    vcvttsd2si %xmm1, %eax
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm2, %xmm1
; AVX512F-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512F-NEXT:    vcvttsd2si %xmm1, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm1
; AVX512F-NEXT:    vpinsrb $1, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512F-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512F-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $2, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512F-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $3, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512F-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512F-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $4, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512F-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $5, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm2, %xmm4
; AVX512F-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512F-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrb $6, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm2, %xmm0
; AVX512F-NEXT:    vminsd %xmm0, %xmm3, %xmm0
; AVX512F-NEXT:    vcvttsd2si %xmm0, %eax
; AVX512F-NEXT:    vpinsrb $7, %eax, %xmm1, %xmm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v8i8_v8f64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vshufpd {{.*#+}} xmm1 = xmm0[1,0]
; AVX512-NEXT:    vxorpd %xmm2, %xmm2, %xmm2
; AVX512-NEXT:    vmaxsd %xmm1, %xmm2, %xmm1
; AVX512-NEXT:    vmovsd {{.*#+}} xmm3 = [2.55E+2,0.0E+0]
; AVX512-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512-NEXT:    vcvttsd2si %xmm1, %eax
; AVX512-NEXT:    vmaxsd %xmm0, %xmm2, %xmm1
; AVX512-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512-NEXT:    vcvttsd2si %xmm1, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm1
; AVX512-NEXT:    vpinsrb $1, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $2, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $3, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $4, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $5, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512-NEXT:    vmaxsd %xmm0, %xmm2, %xmm4
; AVX512-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $6, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT:    vmaxsd %xmm0, %xmm2, %xmm0
; AVX512-NEXT:    vminsd %xmm0, %xmm3, %xmm0
; AVX512-NEXT:    vcvttsd2si %xmm0, %eax
; AVX512-NEXT:    vpinsrb $7, %eax, %xmm1, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
  %x = call <8 x i8> @llvm.fptoui.sat.v8i8.v8f64(<8 x double> %f)
  ret <8 x i8> %x
}

define <8 x i16> @test_unsigned_v8i16_v8f64(<8 x double> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v8i16_v8f64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm1 = xmm0[1,0]
; AVX512F-NEXT:    vxorpd %xmm2, %xmm2, %xmm2
; AVX512F-NEXT:    vmaxsd %xmm1, %xmm2, %xmm1
; AVX512F-NEXT:    vmovsd {{.*#+}} xmm3 = [6.5535E+4,0.0E+0]
; AVX512F-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512F-NEXT:    vcvttsd2si %xmm1, %eax
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm2, %xmm1
; AVX512F-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512F-NEXT:    vcvttsd2si %xmm1, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm1
; AVX512F-NEXT:    vpinsrw $1, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512F-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512F-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $2, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512F-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrw $3, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512F-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512F-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrw $4, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512F-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512F-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512F-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrw $5, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm2, %xmm4
; AVX512F-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512F-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512F-NEXT:    vpinsrw $6, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm2, %xmm0
; AVX512F-NEXT:    vminsd %xmm0, %xmm3, %xmm0
; AVX512F-NEXT:    vcvttsd2si %xmm0, %eax
; AVX512F-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v8i16_v8f64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vshufpd {{.*#+}} xmm1 = xmm0[1,0]
; AVX512-NEXT:    vxorpd %xmm2, %xmm2, %xmm2
; AVX512-NEXT:    vmaxsd %xmm1, %xmm2, %xmm1
; AVX512-NEXT:    vmovsd {{.*#+}} xmm3 = [6.5535E+4,0.0E+0]
; AVX512-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512-NEXT:    vcvttsd2si %xmm1, %eax
; AVX512-NEXT:    vmaxsd %xmm0, %xmm2, %xmm1
; AVX512-NEXT:    vminsd %xmm1, %xmm3, %xmm1
; AVX512-NEXT:    vcvttsd2si %xmm1, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm1
; AVX512-NEXT:    vpinsrw $1, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $2, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512-NEXT:    vpinsrw $3, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm5
; AVX512-NEXT:    vminsd %xmm5, %xmm3, %xmm5
; AVX512-NEXT:    vcvttsd2si %xmm5, %eax
; AVX512-NEXT:    vpinsrw $4, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512-NEXT:    vmaxsd %xmm4, %xmm2, %xmm4
; AVX512-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512-NEXT:    vpinsrw $5, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
; AVX512-NEXT:    vmaxsd %xmm0, %xmm2, %xmm4
; AVX512-NEXT:    vminsd %xmm4, %xmm3, %xmm4
; AVX512-NEXT:    vcvttsd2si %xmm4, %eax
; AVX512-NEXT:    vpinsrw $6, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT:    vmaxsd %xmm0, %xmm2, %xmm0
; AVX512-NEXT:    vminsd %xmm0, %xmm3, %xmm0
; AVX512-NEXT:    vcvttsd2si %xmm0, %eax
; AVX512-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
  %x = call <8 x i16> @llvm.fptoui.sat.v8i16.v8f64(<8 x double> %f)
  ret <8 x i16> %x
}

define <8 x i32> @test_unsigned_v8i32_v8f64(<8 x double> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v8i32_v8f64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm2 = xmm1[1,0]
; AVX512F-NEXT:    vxorpd %xmm3, %xmm3, %xmm3
; AVX512F-NEXT:    vmaxsd %xmm2, %xmm3, %xmm2
; AVX512F-NEXT:    vmovsd {{.*#+}} xmm4 = [4.294967295E+9,0.0E+0]
; AVX512F-NEXT:    vminsd %xmm2, %xmm4, %xmm2
; AVX512F-NEXT:    vcvttsd2si %xmm2, %rax
; AVX512F-NEXT:    vmaxsd %xmm1, %xmm3, %xmm1
; AVX512F-NEXT:    vminsd %xmm1, %xmm4, %xmm1
; AVX512F-NEXT:    vcvttsd2si %xmm1, %rcx
; AVX512F-NEXT:    vmovd %ecx, %xmm1
; AVX512F-NEXT:    vpinsrd $1, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm2
; AVX512F-NEXT:    vmaxsd %xmm2, %xmm3, %xmm5
; AVX512F-NEXT:    vminsd %xmm5, %xmm4, %xmm5
; AVX512F-NEXT:    vcvttsd2si %xmm5, %rax
; AVX512F-NEXT:    vpinsrd $2, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm2 = xmm2[1,0]
; AVX512F-NEXT:    vmaxsd %xmm2, %xmm3, %xmm2
; AVX512F-NEXT:    vminsd %xmm2, %xmm4, %xmm2
; AVX512F-NEXT:    vcvttsd2si %xmm2, %rax
; AVX512F-NEXT:    vpinsrd $3, %eax, %xmm1, %xmm1
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm2 = xmm0[1,0]
; AVX512F-NEXT:    vmaxsd %xmm2, %xmm3, %xmm2
; AVX512F-NEXT:    vminsd %xmm2, %xmm4, %xmm2
; AVX512F-NEXT:    vcvttsd2si %xmm2, %rax
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm3, %xmm2
; AVX512F-NEXT:    vminsd %xmm2, %xmm4, %xmm2
; AVX512F-NEXT:    vcvttsd2si %xmm2, %rcx
; AVX512F-NEXT:    vmovd %ecx, %xmm2
; AVX512F-NEXT:    vpinsrd $1, %eax, %xmm2, %xmm2
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm3, %xmm5
; AVX512F-NEXT:    vminsd %xmm5, %xmm4, %xmm5
; AVX512F-NEXT:    vcvttsd2si %xmm5, %rax
; AVX512F-NEXT:    vpinsrd $2, %eax, %xmm2, %xmm2
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512F-NEXT:    vmaxsd %xmm0, %xmm3, %xmm0
; AVX512F-NEXT:    vminsd %xmm0, %xmm4, %xmm0
; AVX512F-NEXT:    vcvttsd2si %xmm0, %rax
; AVX512F-NEXT:    vpinsrd $3, %eax, %xmm2, %xmm0
; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v8i32_v8f64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm2 = xmm1[1,0]
; AVX512-NEXT:    vxorpd %xmm3, %xmm3, %xmm3
; AVX512-NEXT:    vmovsd {{.*#+}} xmm4 = [4.294967295E+9,0.0E+0]
; AVX512-NEXT:    vmaxsd %xmm2, %xmm3, %xmm2
; AVX512-NEXT:    vminsd %xmm2, %xmm4, %xmm2
; AVX512-NEXT:    vcvttsd2si %xmm2, %rax
; AVX512-NEXT:    vmaxsd %xmm1, %xmm3, %xmm1
; AVX512-NEXT:    vminsd %xmm1, %xmm4, %xmm1
; AVX512-NEXT:    vcvttsd2si %xmm1, %rcx
; AVX512-NEXT:    vmovd %ecx, %xmm1
; AVX512-NEXT:    vpinsrd $1, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm2
; AVX512-NEXT:    vmaxsd %xmm2, %xmm3, %xmm5
; AVX512-NEXT:    vminsd %xmm5, %xmm4, %xmm5
; AVX512-NEXT:    vcvttsd2si %xmm5, %rax
; AVX512-NEXT:    vpinsrd $2, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm2 = xmm2[1,0]
; AVX512-NEXT:    vmaxsd %xmm2, %xmm3, %xmm2
; AVX512-NEXT:    vminsd %xmm2, %xmm4, %xmm2
; AVX512-NEXT:    vcvttsd2si %xmm2, %rax
; AVX512-NEXT:    vpinsrd $3, %eax, %xmm1, %xmm1
; AVX512-NEXT:    vshufpd {{.*#+}} xmm2 = xmm0[1,0]
; AVX512-NEXT:    vmaxsd %xmm2, %xmm3, %xmm2
; AVX512-NEXT:    vminsd %xmm2, %xmm4, %xmm2
; AVX512-NEXT:    vcvttsd2si %xmm2, %rax
; AVX512-NEXT:    vmaxsd %xmm0, %xmm3, %xmm2
; AVX512-NEXT:    vminsd %xmm2, %xmm4, %xmm2
; AVX512-NEXT:    vcvttsd2si %xmm2, %rcx
; AVX512-NEXT:    vmovd %ecx, %xmm2
; AVX512-NEXT:    vpinsrd $1, %eax, %xmm2, %xmm2
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vmaxsd %xmm0, %xmm3, %xmm5
; AVX512-NEXT:    vminsd %xmm5, %xmm4, %xmm5
; AVX512-NEXT:    vcvttsd2si %xmm5, %rax
; AVX512-NEXT:    vpinsrd $2, %eax, %xmm2, %xmm2
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT:    vmaxsd %xmm0, %xmm3, %xmm0
; AVX512-NEXT:    vminsd %xmm0, %xmm4, %xmm0
; AVX512-NEXT:    vcvttsd2si %xmm0, %rax
; AVX512-NEXT:    vpinsrd $3, %eax, %xmm2, %xmm0
; AVX512-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512-NEXT:    retq
  %x = call <8 x i32> @llvm.fptoui.sat.v8i32.v8f64(<8 x double> %f)
  ret <8 x i32> %x
}

define <8 x i64> @test_unsigned_v8i64_v8f64(<8 x double> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v8i64_v8f64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vextractf32x4 $3, %zmm0, %xmm3
; AVX512F-NEXT:    vcvttsd2usi %xmm3, %rdx
; AVX512F-NEXT:    xorl %eax, %eax
; AVX512F-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vucomisd %xmm1, %xmm3
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vmovsd {{.*#+}} xmm2 = [1.844674407370955E+19,0.0E+0]
; AVX512F-NEXT:    vucomisd %xmm2, %xmm3
; AVX512F-NEXT:    movq $-1, %rcx
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm3 = xmm3[1,0]
; AVX512F-NEXT:    vcvttsd2usi %xmm3, %rsi
; AVX512F-NEXT:    vucomisd %xmm1, %xmm3
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomisd %xmm2, %xmm3
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vextractf32x4 $2, %zmm0, %xmm3
; AVX512F-NEXT:    vcvttsd2usi %xmm3, %rdi
; AVX512F-NEXT:    vucomisd %xmm1, %xmm3
; AVX512F-NEXT:    cmovbq %rax, %rdi
; AVX512F-NEXT:    vucomisd %xmm2, %xmm3
; AVX512F-NEXT:    cmovaq %rcx, %rdi
; AVX512F-NEXT:    vmovq %rdx, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm3 = xmm3[1,0]
; AVX512F-NEXT:    vcvttsd2usi %xmm3, %rdx
; AVX512F-NEXT:    vmovq %rsi, %xmm5
; AVX512F-NEXT:    vucomisd %xmm1, %xmm3
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomisd %xmm2, %xmm3
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vmovq %rdi, %xmm3
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm6
; AVX512F-NEXT:    vcvttsd2usi %xmm6, %rsi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
; AVX512F-NEXT:    vucomisd %xmm1, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomisd %xmm2, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm5
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm6 = xmm6[1,0]
; AVX512F-NEXT:    vcvttsd2usi %xmm6, %rdx
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0]
; AVX512F-NEXT:    vucomisd %xmm1, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomisd %xmm2, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vinserti128 $1, %xmm4, %ymm3, %ymm3
; AVX512F-NEXT:    vmovq %rsi, %xmm4
; AVX512F-NEXT:    vcvttsd2usi %xmm0, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm5
; AVX512F-NEXT:    vucomisd %xmm1, %xmm0
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomisd %xmm2, %xmm0
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512F-NEXT:    vcvttsd2usi %xmm0, %rdx
; AVX512F-NEXT:    vmovq %rsi, %xmm5
; AVX512F-NEXT:    vucomisd %xmm1, %xmm0
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomisd %xmm2, %xmm0
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vmovq %rdx, %xmm0
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm5[0],xmm0[0]
; AVX512F-NEXT:    vinserti128 $1, %xmm4, %ymm0, %ymm0
; AVX512F-NEXT:    vinserti64x4 $1, %ymm3, %zmm0, %zmm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v8i64_v8f64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vextractf32x4 $3, %zmm0, %xmm3
; AVX512-NEXT:    vcvttsd2usi %xmm3, %rdx
; AVX512-NEXT:    xorl %eax, %eax
; AVX512-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vucomisd %xmm1, %xmm3
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vmovsd {{.*#+}} xmm2 = [1.844674407370955E+19,0.0E+0]
; AVX512-NEXT:    vucomisd %xmm2, %xmm3
; AVX512-NEXT:    movq $-1, %rcx
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm3 = xmm3[1,0]
; AVX512-NEXT:    vcvttsd2usi %xmm3, %rdx
; AVX512-NEXT:    vucomisd %xmm1, %xmm3
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomisd %xmm2, %xmm3
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm3
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512-NEXT:    vextractf32x4 $2, %zmm0, %xmm4
; AVX512-NEXT:    vcvttsd2usi %xmm4, %rdx
; AVX512-NEXT:    vucomisd %xmm1, %xmm4
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomisd %xmm2, %xmm4
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512-NEXT:    vcvttsd2usi %xmm4, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm5
; AVX512-NEXT:    vucomisd %xmm1, %xmm4
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomisd %xmm2, %xmm4
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vmovq %rsi, %xmm4
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm4 = xmm5[0],xmm4[0]
; AVX512-NEXT:    vinserti128 $1, %xmm3, %ymm4, %ymm3
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512-NEXT:    vcvttsd2usi %xmm4, %rdx
; AVX512-NEXT:    vucomisd %xmm1, %xmm4
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomisd %xmm2, %xmm4
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm5
; AVX512-NEXT:    vshufpd {{.*#+}} xmm4 = xmm4[1,0]
; AVX512-NEXT:    vcvttsd2usi %xmm4, %rdx
; AVX512-NEXT:    vucomisd %xmm1, %xmm4
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomisd %xmm2, %xmm4
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm4
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm4 = xmm5[0],xmm4[0]
; AVX512-NEXT:    vcvttsd2usi %xmm0, %rdx
; AVX512-NEXT:    vucomisd %xmm1, %xmm0
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomisd %xmm2, %xmm0
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm5
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT:    vcvttsd2usi %xmm0, %rdx
; AVX512-NEXT:    vucomisd %xmm1, %xmm0
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomisd %xmm2, %xmm0
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm0
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm5[0],xmm0[0]
; AVX512-NEXT:    vinserti128 $1, %xmm4, %ymm0, %ymm0
; AVX512-NEXT:    vinserti64x4 $1, %ymm3, %zmm0, %zmm0
; AVX512-NEXT:    retq
  %x = call <8 x i64> @llvm.fptoui.sat.v8i64.v8f64(<8 x double> %f)
  ret <8 x i64> %x
}

define <8 x i128> @test_unsigned_v8i128_v8f64(<8 x double> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v8i128_v8f64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    pushq %rbp
; AVX512F-NEXT:    pushq %r15
; AVX512F-NEXT:    pushq %r14
; AVX512F-NEXT:    pushq %r13
; AVX512F-NEXT:    pushq %r12
; AVX512F-NEXT:    pushq %rbx
; AVX512F-NEXT:    subq $216, %rsp
; AVX512F-NEXT:    vmovupd %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512F-NEXT:    movq %rdi, %rbx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512F-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunsdfti@PLT
; AVX512F-NEXT:    xorl %r12d, %r12d
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomisd %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r12, %rdx
; AVX512F-NEXT:    cmovbq %r12, %rax
; AVX512F-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    movq $-1, %r13
; AVX512F-NEXT:    cmovaq %r13, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r13, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512F-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunsdfti@PLT
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomisd %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r12, %rdx
; AVX512F-NEXT:    cmovbq %r12, %rax
; AVX512F-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r13, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r13, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    vextractf64x4 $1, %zmm0, %ymm0
; AVX512F-NEXT:    vmovupd %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512F-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunsdfti@PLT
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovapd (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomisd %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r12, %rdx
; AVX512F-NEXT:    cmovbq %r12, %rax
; AVX512F-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r13, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r13, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512F-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512F-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunsdfti@PLT
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomisd %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r12, %rdx
; AVX512F-NEXT:    cmovbq %r12, %rax
; AVX512F-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r13, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r13, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512F-NEXT:    callq __fixunsdfti@PLT
; AVX512F-NEXT:    movq %rdx, %rbp
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload
; AVX512F-NEXT:    vucomisd %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r12, %rbp
; AVX512F-NEXT:    cmovbq %r12, %rax
; AVX512F-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r13, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r13, %rbp
; AVX512F-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    callq __fixunsdfti@PLT
; AVX512F-NEXT:    movq %rax, %r14
; AVX512F-NEXT:    movq %rdx, %r15
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomisd %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r12, %r15
; AVX512F-NEXT:    cmovbq %r12, %r14
; AVX512F-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r13, %r14
; AVX512F-NEXT:    cmovaq %r13, %r15
; AVX512F-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512F-NEXT:    callq __fixunsdfti@PLT
; AVX512F-NEXT:    movq %rax, %r12
; AVX512F-NEXT:    movq %rdx, %r13
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload
; AVX512F-NEXT:    vucomisd %xmm0, %xmm1
; AVX512F-NEXT:    movl $0, %eax
; AVX512F-NEXT:    cmovbq %rax, %r13
; AVX512F-NEXT:    cmovbq %rax, %r12
; AVX512F-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    movq $-1, %rax
; AVX512F-NEXT:    cmovaq %rax, %r12
; AVX512F-NEXT:    cmovaq %rax, %r13
; AVX512F-NEXT:    vmovapd (%rsp), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    callq __fixunsdfti@PLT
; AVX512F-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovapd (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomisd %xmm0, %xmm1
; AVX512F-NEXT:    movl $0, %ecx
; AVX512F-NEXT:    cmovbq %rcx, %rdx
; AVX512F-NEXT:    cmovbq %rcx, %rax
; AVX512F-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    movq $-1, %rcx
; AVX512F-NEXT:    cmovaq %rcx, %rax
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    movq %rdx, 104(%rbx)
; AVX512F-NEXT:    movq %rax, 96(%rbx)
; AVX512F-NEXT:    movq %r13, 72(%rbx)
; AVX512F-NEXT:    movq %r12, 64(%rbx)
; AVX512F-NEXT:    movq %r15, 40(%rbx)
; AVX512F-NEXT:    movq %r14, 32(%rbx)
; AVX512F-NEXT:    movq %rbp, 8(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, (%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 120(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 112(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 88(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 80(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 56(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 48(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 24(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 16(%rbx)
; AVX512F-NEXT:    movq %rbx, %rax
; AVX512F-NEXT:    addq $216, %rsp
; AVX512F-NEXT:    popq %rbx
; AVX512F-NEXT:    popq %r12
; AVX512F-NEXT:    popq %r13
; AVX512F-NEXT:    popq %r14
; AVX512F-NEXT:    popq %r15
; AVX512F-NEXT:    popq %rbp
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v8i128_v8f64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    pushq %rbp
; AVX512-NEXT:    pushq %r15
; AVX512-NEXT:    pushq %r14
; AVX512-NEXT:    pushq %r13
; AVX512-NEXT:    pushq %r12
; AVX512-NEXT:    pushq %rbx
; AVX512-NEXT:    subq $216, %rsp
; AVX512-NEXT:    vmovupd %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT:    movq %rdi, %rbx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunsdfti@PLT
; AVX512-NEXT:    xorl %r12d, %r12d
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomisd %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r12, %rdx
; AVX512-NEXT:    cmovbq %r12, %rax
; AVX512-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    movq $-1, %r13
; AVX512-NEXT:    cmovaq %r13, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r13, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunsdfti@PLT
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomisd %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r12, %rdx
; AVX512-NEXT:    cmovbq %r12, %rax
; AVX512-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r13, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r13, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT:    vextractf64x4 $1, %zmm0, %ymm0
; AVX512-NEXT:    vmovupd %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunsdfti@PLT
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovapd (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomisd %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r12, %rdx
; AVX512-NEXT:    cmovbq %r12, %rax
; AVX512-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r13, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r13, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT:    vmovapd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunsdfti@PLT
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomisd %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r12, %rdx
; AVX512-NEXT:    cmovbq %r12, %rax
; AVX512-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r13, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r13, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunsdfti@PLT
; AVX512-NEXT:    movq %rdx, %rbp
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload
; AVX512-NEXT:    vucomisd %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r12, %rbp
; AVX512-NEXT:    cmovbq %r12, %rax
; AVX512-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r13, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r13, %rbp
; AVX512-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunsdfti@PLT
; AVX512-NEXT:    movq %rax, %r14
; AVX512-NEXT:    movq %rdx, %r15
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomisd %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r12, %r15
; AVX512-NEXT:    cmovbq %r12, %r14
; AVX512-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r13, %r14
; AVX512-NEXT:    cmovaq %r13, %r15
; AVX512-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunsdfti@PLT
; AVX512-NEXT:    movq %rax, %r12
; AVX512-NEXT:    movq %rdx, %r13
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload
; AVX512-NEXT:    vucomisd %xmm0, %xmm1
; AVX512-NEXT:    movl $0, %eax
; AVX512-NEXT:    cmovbq %rax, %r13
; AVX512-NEXT:    cmovbq %rax, %r12
; AVX512-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    movq $-1, %rax
; AVX512-NEXT:    cmovaq %rax, %r12
; AVX512-NEXT:    cmovaq %rax, %r13
; AVX512-NEXT:    vmovapd (%rsp), %xmm0 # 16-byte Reload
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunsdfti@PLT
; AVX512-NEXT:    vxorpd %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovapd (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomisd %xmm0, %xmm1
; AVX512-NEXT:    movl $0, %ecx
; AVX512-NEXT:    cmovbq %rcx, %rdx
; AVX512-NEXT:    cmovbq %rcx, %rax
; AVX512-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    movq $-1, %rcx
; AVX512-NEXT:    cmovaq %rcx, %rax
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    movq %rdx, 104(%rbx)
; AVX512-NEXT:    movq %rax, 96(%rbx)
; AVX512-NEXT:    movq %r13, 72(%rbx)
; AVX512-NEXT:    movq %r12, 64(%rbx)
; AVX512-NEXT:    movq %r15, 40(%rbx)
; AVX512-NEXT:    movq %r14, 32(%rbx)
; AVX512-NEXT:    movq %rbp, 8(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, (%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 120(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 112(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 88(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 80(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 56(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 48(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 24(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 16(%rbx)
; AVX512-NEXT:    movq %rbx, %rax
; AVX512-NEXT:    addq $216, %rsp
; AVX512-NEXT:    popq %rbx
; AVX512-NEXT:    popq %r12
; AVX512-NEXT:    popq %r13
; AVX512-NEXT:    popq %r14
; AVX512-NEXT:    popq %r15
; AVX512-NEXT:    popq %rbp
; AVX512-NEXT:    retq
  %x = call <8 x i128> @llvm.fptoui.sat.v8i128.v8f64(<8 x double> %f)
  ret <8 x i128> %x
}

;
; 16-bit float to unsigned integer
;

define <32 x i1> @test_unsigned_v32i1_v32f16(<32 x half> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v32i1_v32f16:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm3
; AVX512F-NEXT:    vpsrld $16, %xmm3, %xmm1
; AVX512F-NEXT:    vcvtph2ps %xmm1, %xmm2
; AVX512F-NEXT:    vpxor %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vmaxss %xmm1, %xmm2, %xmm4
; AVX512F-NEXT:    vmovss {{.*#+}} xmm2 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vcvtph2ps %xmm3, %xmm4
; AVX512F-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512F-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm4
; AVX512F-NEXT:    vpinsrb $1, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm3[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $2, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrlq $48, %xmm3, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $3, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $4, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $5, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm3[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $6, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm3[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $7, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vextracti128 $1, %ymm3, %xmm3
; AVX512F-NEXT:    vcvtph2ps %xmm3, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $8, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrld $16, %xmm3, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $9, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm3[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $10, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrlq $48, %xmm3, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $11, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $12, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $13, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm3[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $14, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm3 = xmm3[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm3, %xmm3
; AVX512F-NEXT:    vmaxss %xmm1, %xmm3, %xmm3
; AVX512F-NEXT:    vminss %xmm2, %xmm3, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %eax
; AVX512F-NEXT:    vpinsrb $15, %eax, %xmm4, %xmm3
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm4
; AVX512F-NEXT:    vcvtph2ps %xmm4, %xmm4
; AVX512F-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512F-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm4
; AVX512F-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512F-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm4
; AVX512F-NEXT:    vpinsrb $1, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $2, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $3, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $4, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $5, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $6, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $7, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $8, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $9, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $10, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $11, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $12, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %ecx
; AVX512F-NEXT:    vpbroadcastd {{.*#+}} zmm5 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; AVX512F-NEXT:    vpinsrb $13, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero
; AVX512F-NEXT:    vpinsrb $14, %ecx, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmaxss %xmm1, %xmm0, %xmm0
; AVX512F-NEXT:    vminss %xmm2, %xmm0, %xmm0
; AVX512F-NEXT:    vcvttss2si %xmm0, %eax
; AVX512F-NEXT:    vpinsrb $15, %eax, %xmm4, %xmm0
; AVX512F-NEXT:    vptestmd %zmm5, %zmm3, %k1
; AVX512F-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512F-NEXT:    vptestmd %zmm5, %zmm0, %k2
; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm0 {%k2} {z} = -1
; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm1 {%k1} {z} = -1
; AVX512F-NEXT:    vpmovdb %zmm1, %xmm1
; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v32i1_v32f16:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vextracti32x4 $2, %zmm0, %xmm3
; AVX512-NEXT:    vpsrld $16, %xmm3, %xmm1
; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm4
; AVX512-NEXT:    vpxor %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm4
; AVX512-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm4
; AVX512-NEXT:    vpinsrb $1, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm3[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $2, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrlq $48, %xmm3, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $3, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $4, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $5, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm3[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $6, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm3 = xmm3[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm3
; AVX512-NEXT:    vmaxss %xmm1, %xmm3, %xmm3
; AVX512-NEXT:    vminss %xmm2, %xmm3, %xmm3
; AVX512-NEXT:    vcvttss2si %xmm3, %eax
; AVX512-NEXT:    vpinsrb $7, %eax, %xmm4, %xmm3
; AVX512-NEXT:    vextracti32x4 $3, %zmm0, %xmm4
; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $8, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrld $16, %xmm4, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $9, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $10, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrlq $48, %xmm4, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $11, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $12, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm4[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $13, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm4[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $14, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm4 = xmm4[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
; AVX512-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $15, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm4
; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
; AVX512-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm4
; AVX512-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm4
; AVX512-NEXT:    vpinsrb $1, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $2, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrlq $48, %xmm0, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $3, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $4, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $5, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $6, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $7, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $8, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $9, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $10, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrlq $48, %xmm0, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $11, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $12, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $13, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $14, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmaxss %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vminss %xmm2, %xmm0, %xmm0
; AVX512-NEXT:    vcvttss2si %xmm0, %eax
; AVX512-NEXT:    vpinsrb $15, %eax, %xmm4, %xmm0
; AVX512-NEXT:    vinserti128 $1, %xmm3, %ymm0, %ymm0
; AVX512-NEXT:    vptestmb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %k0
; AVX512-NEXT:    vpmovm2b %k0, %ymm0
; AVX512-NEXT:    retq
  %x = call <32 x i1> @llvm.fptoui.sat.v32i1.v32f16(<32 x half> %f)
  ret <32 x i1> %x
}

define <32 x i8> @test_unsigned_v32i8_v32f16(<32 x half> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v32i8_v32f16:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vextracti32x4 $2, %zmm0, %xmm3
; AVX512F-NEXT:    vpsrld $16, %xmm3, %xmm1
; AVX512F-NEXT:    vcvtph2ps %xmm1, %xmm2
; AVX512F-NEXT:    vpxor %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vmaxss %xmm1, %xmm2, %xmm4
; AVX512F-NEXT:    vmovss {{.*#+}} xmm2 = [2.55E+2,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vcvtph2ps %xmm3, %xmm4
; AVX512F-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512F-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm4
; AVX512F-NEXT:    vpinsrb $1, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm3[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $2, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrlq $48, %xmm3, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $3, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $4, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $5, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm3[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $6, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm3 = xmm3[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm3, %xmm3
; AVX512F-NEXT:    vmaxss %xmm1, %xmm3, %xmm3
; AVX512F-NEXT:    vminss %xmm2, %xmm3, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %eax
; AVX512F-NEXT:    vpinsrb $7, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vextracti32x4 $3, %zmm0, %xmm3
; AVX512F-NEXT:    vcvtph2ps %xmm3, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $8, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrld $16, %xmm3, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $9, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm3[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $10, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrlq $48, %xmm3, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $11, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $12, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $13, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm3[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $14, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm3 = xmm3[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm3, %xmm3
; AVX512F-NEXT:    vmaxss %xmm1, %xmm3, %xmm3
; AVX512F-NEXT:    vminss %xmm2, %xmm3, %xmm3
; AVX512F-NEXT:    vcvttss2si %xmm3, %eax
; AVX512F-NEXT:    vpinsrb $15, %eax, %xmm4, %xmm3
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm4
; AVX512F-NEXT:    vcvtph2ps %xmm4, %xmm4
; AVX512F-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512F-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %eax
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm4
; AVX512F-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512F-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512F-NEXT:    vmovd %ecx, %xmm4
; AVX512F-NEXT:    vpinsrb $1, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $2, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $3, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $4, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $5, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $6, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $7, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $8, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $9, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $10, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $11, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $12, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $13, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512F-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2si %xmm5, %eax
; AVX512F-NEXT:    vpinsrb $14, %eax, %xmm4, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmaxss %xmm1, %xmm0, %xmm0
; AVX512F-NEXT:    vminss %xmm2, %xmm0, %xmm0
; AVX512F-NEXT:    vcvttss2si %xmm0, %eax
; AVX512F-NEXT:    vpinsrb $15, %eax, %xmm4, %xmm0
; AVX512F-NEXT:    vinserti128 $1, %xmm3, %ymm0, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v32i8_v32f16:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vextracti32x4 $2, %zmm0, %xmm3
; AVX512-NEXT:    vpsrld $16, %xmm3, %xmm1
; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm2
; AVX512-NEXT:    vpxor %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vmaxss %xmm1, %xmm2, %xmm4
; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = [2.55E+2,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm4
; AVX512-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm4
; AVX512-NEXT:    vpinsrb $1, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm3[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $2, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrlq $48, %xmm3, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $3, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $4, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $5, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm3[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $6, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm3 = xmm3[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm3
; AVX512-NEXT:    vmaxss %xmm1, %xmm3, %xmm3
; AVX512-NEXT:    vminss %xmm2, %xmm3, %xmm3
; AVX512-NEXT:    vcvttss2si %xmm3, %eax
; AVX512-NEXT:    vpinsrb $7, %eax, %xmm4, %xmm3
; AVX512-NEXT:    vextracti32x4 $3, %zmm0, %xmm4
; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $8, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrld $16, %xmm4, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $9, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm4[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $10, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrlq $48, %xmm4, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $11, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm4[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $12, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm4[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $13, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm4[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $14, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm4 = xmm4[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
; AVX512-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vpinsrb $15, %eax, %xmm3, %xmm3
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm4
; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
; AVX512-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %eax
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm4
; AVX512-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; AVX512-NEXT:    vminss %xmm2, %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2si %xmm4, %ecx
; AVX512-NEXT:    vmovd %ecx, %xmm4
; AVX512-NEXT:    vpinsrb $1, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $2, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrlq $48, %xmm0, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $3, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $4, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $5, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $6, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $7, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $8, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $9, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $10, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrlq $48, %xmm0, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $11, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $12, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $13, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; AVX512-NEXT:    vminss %xmm2, %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2si %xmm5, %eax
; AVX512-NEXT:    vpinsrb $14, %eax, %xmm4, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmaxss %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vminss %xmm2, %xmm0, %xmm0
; AVX512-NEXT:    vcvttss2si %xmm0, %eax
; AVX512-NEXT:    vpinsrb $15, %eax, %xmm4, %xmm0
; AVX512-NEXT:    vinserti128 $1, %xmm3, %ymm0, %ymm0
; AVX512-NEXT:    retq
  %x = call <32 x i8> @llvm.fptoui.sat.v32i8.v32f16(<32 x half> %f)
  ret <32 x i8> %x
}

define <32 x i16> @test_unsigned_v32i16_v32f16(<32 x half> %f) nounwind {
; CHECK-LABEL: test_unsigned_v32i16_v32f16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vextracti32x4 $3, %zmm0, %xmm3
; CHECK-NEXT:    vpsrld $16, %xmm3, %xmm1
; CHECK-NEXT:    vcvtph2ps %xmm1, %xmm2
; CHECK-NEXT:    vpxor %xmm1, %xmm1, %xmm1
; CHECK-NEXT:    vmaxss %xmm1, %xmm2, %xmm4
; CHECK-NEXT:    vmovss {{.*#+}} xmm2 = [6.5535E+4,0.0E+0,0.0E+0,0.0E+0]
; CHECK-NEXT:    vminss %xmm2, %xmm4, %xmm4
; CHECK-NEXT:    vcvttss2si %xmm4, %eax
; CHECK-NEXT:    vcvtph2ps %xmm3, %xmm4
; CHECK-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; CHECK-NEXT:    vminss %xmm2, %xmm4, %xmm4
; CHECK-NEXT:    vcvttss2si %xmm4, %ecx
; CHECK-NEXT:    vmovd %ecx, %xmm4
; CHECK-NEXT:    vpinsrw $1, %eax, %xmm4, %xmm4
; CHECK-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm3[1,1,3,3]
; CHECK-NEXT:    vcvtph2ps %xmm5, %xmm5
; CHECK-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; CHECK-NEXT:    vminss %xmm2, %xmm5, %xmm5
; CHECK-NEXT:    vcvttss2si %xmm5, %eax
; CHECK-NEXT:    vpinsrw $2, %eax, %xmm4, %xmm4
; CHECK-NEXT:    vpsrlq $48, %xmm3, %xmm5
; CHECK-NEXT:    vcvtph2ps %xmm5, %xmm5
; CHECK-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; CHECK-NEXT:    vminss %xmm2, %xmm5, %xmm5
; CHECK-NEXT:    vcvttss2si %xmm5, %eax
; CHECK-NEXT:    vpinsrw $3, %eax, %xmm4, %xmm4
; CHECK-NEXT:    vshufpd {{.*#+}} xmm5 = xmm3[1,0]
; CHECK-NEXT:    vcvtph2ps %xmm5, %xmm5
; CHECK-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; CHECK-NEXT:    vminss %xmm2, %xmm5, %xmm5
; CHECK-NEXT:    vcvttss2si %xmm5, %eax
; CHECK-NEXT:    vpinsrw $4, %eax, %xmm4, %xmm4
; CHECK-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT:    vcvtph2ps %xmm5, %xmm5
; CHECK-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; CHECK-NEXT:    vminss %xmm2, %xmm5, %xmm5
; CHECK-NEXT:    vcvttss2si %xmm5, %eax
; CHECK-NEXT:    vpinsrw $5, %eax, %xmm4, %xmm4
; CHECK-NEXT:    vshufps {{.*#+}} xmm5 = xmm3[3,3,3,3]
; CHECK-NEXT:    vcvtph2ps %xmm5, %xmm5
; CHECK-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; CHECK-NEXT:    vminss %xmm2, %xmm5, %xmm5
; CHECK-NEXT:    vcvttss2si %xmm5, %eax
; CHECK-NEXT:    vpinsrw $6, %eax, %xmm4, %xmm4
; CHECK-NEXT:    vpsrldq {{.*#+}} xmm3 = xmm3[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT:    vcvtph2ps %xmm3, %xmm3
; CHECK-NEXT:    vmaxss %xmm1, %xmm3, %xmm3
; CHECK-NEXT:    vminss %xmm2, %xmm3, %xmm3
; CHECK-NEXT:    vcvttss2si %xmm3, %eax
; CHECK-NEXT:    vpinsrw $7, %eax, %xmm4, %xmm3
; CHECK-NEXT:    vextracti32x4 $2, %zmm0, %xmm4
; CHECK-NEXT:    vpsrld $16, %xmm4, %xmm5
; CHECK-NEXT:    vcvtph2ps %xmm5, %xmm5
; CHECK-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; CHECK-NEXT:    vminss %xmm2, %xmm5, %xmm5
; CHECK-NEXT:    vcvttss2si %xmm5, %eax
; CHECK-NEXT:    vcvtph2ps %xmm4, %xmm5
; CHECK-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; CHECK-NEXT:    vminss %xmm2, %xmm5, %xmm5
; CHECK-NEXT:    vcvttss2si %xmm5, %ecx
; CHECK-NEXT:    vmovd %ecx, %xmm5
; CHECK-NEXT:    vpinsrw $1, %eax, %xmm5, %xmm5
; CHECK-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm4[1,1,3,3]
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %eax
; CHECK-NEXT:    vpinsrw $2, %eax, %xmm5, %xmm5
; CHECK-NEXT:    vpsrlq $48, %xmm4, %xmm6
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %eax
; CHECK-NEXT:    vpinsrw $3, %eax, %xmm5, %xmm5
; CHECK-NEXT:    vshufpd {{.*#+}} xmm6 = xmm4[1,0]
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %eax
; CHECK-NEXT:    vpinsrw $4, %eax, %xmm5, %xmm5
; CHECK-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm4[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %eax
; CHECK-NEXT:    vpinsrw $5, %eax, %xmm5, %xmm5
; CHECK-NEXT:    vshufps {{.*#+}} xmm6 = xmm4[3,3,3,3]
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %eax
; CHECK-NEXT:    vpinsrw $6, %eax, %xmm5, %xmm5
; CHECK-NEXT:    vpsrldq {{.*#+}} xmm4 = xmm4[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT:    vcvtph2ps %xmm4, %xmm4
; CHECK-NEXT:    vmaxss %xmm1, %xmm4, %xmm4
; CHECK-NEXT:    vminss %xmm2, %xmm4, %xmm4
; CHECK-NEXT:    vcvttss2si %xmm4, %eax
; CHECK-NEXT:    vpinsrw $7, %eax, %xmm5, %xmm4
; CHECK-NEXT:    vextracti128 $1, %ymm0, %xmm5
; CHECK-NEXT:    vpsrld $16, %xmm5, %xmm6
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %eax
; CHECK-NEXT:    vcvtph2ps %xmm5, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %ecx
; CHECK-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm5[1,1,3,3]
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %edx
; CHECK-NEXT:    vpsrlq $48, %xmm5, %xmm6
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %esi
; CHECK-NEXT:    vshufpd {{.*#+}} xmm6 = xmm5[1,0]
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %edi
; CHECK-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm5[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %r8d
; CHECK-NEXT:    vshufps {{.*#+}} xmm6 = xmm5[3,3,3,3]
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %r9d
; CHECK-NEXT:    vmovd %ecx, %xmm6
; CHECK-NEXT:    vpinsrw $1, %eax, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $2, %edx, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $3, %esi, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $4, %edi, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $5, %r8d, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $6, %r9d, %xmm6, %xmm6
; CHECK-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm5[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT:    vcvtph2ps %xmm5, %xmm5
; CHECK-NEXT:    vmaxss %xmm1, %xmm5, %xmm5
; CHECK-NEXT:    vminss %xmm2, %xmm5, %xmm5
; CHECK-NEXT:    vcvttss2si %xmm5, %eax
; CHECK-NEXT:    vpinsrw $7, %eax, %xmm6, %xmm5
; CHECK-NEXT:    vpsrld $16, %xmm0, %xmm6
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %eax
; CHECK-NEXT:    vcvtph2ps %xmm0, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %ecx
; CHECK-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm0[1,1,3,3]
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %edx
; CHECK-NEXT:    vpsrlq $48, %xmm0, %xmm6
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %esi
; CHECK-NEXT:    vshufpd {{.*#+}} xmm6 = xmm0[1,0]
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %edi
; CHECK-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %r8d
; CHECK-NEXT:    vshufps {{.*#+}} xmm6 = xmm0[3,3,3,3]
; CHECK-NEXT:    vcvtph2ps %xmm6, %xmm6
; CHECK-NEXT:    vmaxss %xmm1, %xmm6, %xmm6
; CHECK-NEXT:    vminss %xmm2, %xmm6, %xmm6
; CHECK-NEXT:    vcvttss2si %xmm6, %r9d
; CHECK-NEXT:    vmovd %ecx, %xmm6
; CHECK-NEXT:    vpinsrw $1, %eax, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $2, %edx, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $3, %esi, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $4, %edi, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $5, %r8d, %xmm6, %xmm6
; CHECK-NEXT:    vpinsrw $6, %r9d, %xmm6, %xmm6
; CHECK-NEXT:    vinserti128 $1, %xmm3, %ymm4, %ymm3
; CHECK-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT:    vcvtph2ps %xmm0, %xmm0
; CHECK-NEXT:    vmaxss %xmm1, %xmm0, %xmm0
; CHECK-NEXT:    vminss %xmm2, %xmm0, %xmm0
; CHECK-NEXT:    vcvttss2si %xmm0, %eax
; CHECK-NEXT:    vpinsrw $7, %eax, %xmm6, %xmm0
; CHECK-NEXT:    vinserti128 $1, %xmm5, %ymm0, %ymm0
; CHECK-NEXT:    vinserti64x4 $1, %ymm3, %zmm0, %zmm0
; CHECK-NEXT:    retq
  %x = call <32 x i16> @llvm.fptoui.sat.v32i16.v32f16(<32 x half> %f)
  ret <32 x i16> %x
}

define <32 x i32> @test_unsigned_v32i32_v32f16(<32 x half> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v32i32_v32f16:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm1 = xmm4[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm1, %xmm3
; AVX512F-NEXT:    vcvttss2usi %xmm3, %edx
; AVX512F-NEXT:    xorl %eax, %eax
; AVX512F-NEXT:    vpxor %xmm1, %xmm1, %xmm1
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vmovss {{.*#+}} xmm2 = [4.29496704E+9,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    movl $-1, %ecx
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm3 = xmm4[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm3, %xmm3
; AVX512F-NEXT:    vcvttss2usi %xmm3, %esi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm3
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm3
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vmovd %esi, %xmm3
; AVX512F-NEXT:    vpinsrd $1, %edx, %xmm3, %xmm3
; AVX512F-NEXT:    vshufps {{.*#+}} xmm5 = xmm4[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $2, %edx, %xmm3, %xmm3
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm4[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm3, %xmm3
; AVX512F-NEXT:    vpsrld $16, %xmm4, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vcvtph2ps %xmm4, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %esi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vmovd %esi, %xmm5
; AVX512F-NEXT:    vpinsrd $1, %edx, %xmm5, %xmm5
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm4[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm6
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm6
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $2, %edx, %xmm5, %xmm5
; AVX512F-NEXT:    vpsrlq $48, %xmm4, %xmm4
; AVX512F-NEXT:    vcvtph2ps %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2usi %xmm4, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm4
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm4
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm5, %xmm4
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %esi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm5
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm5
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vmovd %esi, %xmm5
; AVX512F-NEXT:    vpinsrd $1, %edx, %xmm5, %xmm5
; AVX512F-NEXT:    vshufps {{.*#+}} xmm6 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm6
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm6
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $2, %edx, %xmm5, %xmm5
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm6
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm6
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm5, %xmm5
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm6
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm6
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm6
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %esi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm6
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm6
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vmovd %esi, %xmm6
; AVX512F-NEXT:    vpinsrd $1, %edx, %xmm6, %xmm6
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm7 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512F-NEXT:    vcvttss2usi %xmm7, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm7
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm7
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm7
; AVX512F-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512F-NEXT:    vcvttss2usi %xmm7, %esi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm7
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm7
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vpinsrd $2, %edx, %xmm6, %xmm6
; AVX512F-NEXT:    vpinsrd $3, %esi, %xmm6, %xmm7
; AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm6
; AVX512F-NEXT:    vextracti128 $1, %ymm6, %xmm0
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm8 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm8, %xmm8
; AVX512F-NEXT:    vcvttss2usi %xmm8, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm8
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm8
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm8 = xmm0[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm8, %xmm8
; AVX512F-NEXT:    vcvttss2usi %xmm8, %esi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm8
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm8
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vmovd %esi, %xmm8
; AVX512F-NEXT:    vpinsrd $1, %edx, %xmm8, %xmm8
; AVX512F-NEXT:    vshufps {{.*#+}} xmm9 = xmm0[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm9, %xmm9
; AVX512F-NEXT:    vcvttss2usi %xmm9, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm9
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm9
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $2, %edx, %xmm8, %xmm8
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm9 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm9, %xmm9
; AVX512F-NEXT:    vcvttss2usi %xmm9, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm9
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm9
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm8, %xmm8
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm9
; AVX512F-NEXT:    vcvtph2ps %xmm9, %xmm9
; AVX512F-NEXT:    vcvttss2usi %xmm9, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm9
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm9
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm9
; AVX512F-NEXT:    vcvttss2usi %xmm9, %esi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm9
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm9
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vmovd %esi, %xmm9
; AVX512F-NEXT:    vpinsrd $1, %edx, %xmm9, %xmm9
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm10 = xmm0[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm10, %xmm10
; AVX512F-NEXT:    vcvttss2usi %xmm10, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm10
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm10
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $2, %edx, %xmm9, %xmm9
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vcvttss2usi %xmm0, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm9, %xmm9
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm6[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vcvttss2usi %xmm0, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm0 = xmm6[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vcvttss2usi %xmm0, %esi
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vmovd %esi, %xmm0
; AVX512F-NEXT:    vpinsrd $1, %edx, %xmm0, %xmm0
; AVX512F-NEXT:    vshufps {{.*#+}} xmm10 = xmm6[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm10, %xmm10
; AVX512F-NEXT:    vcvttss2usi %xmm10, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm10
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm10
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $2, %edx, %xmm0, %xmm0
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm10 = xmm6[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm10, %xmm10
; AVX512F-NEXT:    vcvttss2usi %xmm10, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm10
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm10
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm0, %xmm10
; AVX512F-NEXT:    vpsrld $16, %xmm6, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vcvttss2usi %xmm0, %edx
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm0
; AVX512F-NEXT:    vcvttss2usi %xmm0, %esi
; AVX512F-NEXT:    vinserti128 $1, %xmm3, %ymm4, %ymm3
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbl %eax, %esi
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmoval %ecx, %esi
; AVX512F-NEXT:    vmovd %esi, %xmm0
; AVX512F-NEXT:    vpinsrd $1, %edx, %xmm0, %xmm4
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm6[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vcvttss2usi %xmm0, %edx
; AVX512F-NEXT:    vinserti128 $1, %xmm5, %ymm7, %ymm5
; AVX512F-NEXT:    vucomiss %xmm1, %xmm0
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm0
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vinserti64x4 $1, %ymm3, %zmm5, %zmm0
; AVX512F-NEXT:    vpinsrd $2, %edx, %xmm4, %xmm3
; AVX512F-NEXT:    vpsrlq $48, %xmm6, %xmm4
; AVX512F-NEXT:    vcvtph2ps %xmm4, %xmm4
; AVX512F-NEXT:    vcvttss2usi %xmm4, %edx
; AVX512F-NEXT:    vinserti128 $1, %xmm8, %ymm9, %ymm5
; AVX512F-NEXT:    vucomiss %xmm1, %xmm4
; AVX512F-NEXT:    cmovbl %eax, %edx
; AVX512F-NEXT:    vucomiss %xmm2, %xmm4
; AVX512F-NEXT:    cmoval %ecx, %edx
; AVX512F-NEXT:    vpinsrd $3, %edx, %xmm3, %xmm1
; AVX512F-NEXT:    vinserti128 $1, %xmm10, %ymm1, %ymm1
; AVX512F-NEXT:    vinserti64x4 $1, %ymm5, %zmm1, %zmm1
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v32i32_v32f16:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm1 = xmm4[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm3
; AVX512-NEXT:    vcvttss2usi %xmm3, %edx
; AVX512-NEXT:    xorl %eax, %eax
; AVX512-NEXT:    vxorpd %xmm1, %xmm1, %xmm1
; AVX512-NEXT:    vucomiss %xmm1, %xmm3
; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = [4.29496704E+9,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm3
; AVX512-NEXT:    movl $-1, %ecx
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm3 = xmm4[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm3
; AVX512-NEXT:    vcvttss2usi %xmm3, %esi
; AVX512-NEXT:    vucomiss %xmm1, %xmm3
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm3
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovd %esi, %xmm3
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm3, %xmm3
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm4[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm5, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $2, %edx, %xmm3, %xmm3
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm4[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm5, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm3, %xmm3
; AVX512-NEXT:    vpsrld $16, %xmm4, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm5, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm5, %esi
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovd %esi, %xmm5
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm5, %xmm5
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm4[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $2, %edx, %xmm5, %xmm5
; AVX512-NEXT:    vpsrlq $48, %xmm4, %xmm4
; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
; AVX512-NEXT:    vcvttss2usi %xmm4, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm4
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm4
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm5, %xmm4
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm5, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm5 = xmm0[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm5, %esi
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovd %esi, %xmm5
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm5, %xmm5
; AVX512-NEXT:    vshufps {{.*#+}} xmm6 = xmm0[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $2, %edx, %xmm5, %xmm5
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm5, %xmm5
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm6
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %esi
; AVX512-NEXT:    vucomiss %xmm1, %xmm6
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm6
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovd %esi, %xmm6
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm6, %xmm6
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm7 = xmm0[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm7
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm7
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $2, %edx, %xmm6, %xmm6
; AVX512-NEXT:    vpsrlq $48, %xmm0, %xmm7
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm7
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm7
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm6, %xmm7
; AVX512-NEXT:    vextractf64x4 $1, %zmm0, %ymm6
; AVX512-NEXT:    vextractf128 $1, %ymm6, %xmm0
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm8 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm8, %xmm8
; AVX512-NEXT:    vcvttss2usi %xmm8, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm8
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm8
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm8 = xmm0[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm8, %xmm8
; AVX512-NEXT:    vcvttss2usi %xmm8, %esi
; AVX512-NEXT:    vucomiss %xmm1, %xmm8
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm8
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovd %esi, %xmm8
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm8, %xmm8
; AVX512-NEXT:    vshufps {{.*#+}} xmm9 = xmm0[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm9, %xmm9
; AVX512-NEXT:    vcvttss2usi %xmm9, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm9
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm9
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $2, %edx, %xmm8, %xmm8
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm9 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm9, %xmm9
; AVX512-NEXT:    vcvttss2usi %xmm9, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm9
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm9
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm8, %xmm8
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm9
; AVX512-NEXT:    vcvtph2ps %xmm9, %xmm9
; AVX512-NEXT:    vcvttss2usi %xmm9, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm9
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm9
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm9
; AVX512-NEXT:    vcvttss2usi %xmm9, %esi
; AVX512-NEXT:    vucomiss %xmm1, %xmm9
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm9
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm9 = xmm0[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm9, %xmm9
; AVX512-NEXT:    vcvttss2usi %xmm9, %edi
; AVX512-NEXT:    vucomiss %xmm1, %xmm9
; AVX512-NEXT:    cmovbl %eax, %edi
; AVX512-NEXT:    vucomiss %xmm2, %xmm9
; AVX512-NEXT:    vmovd %esi, %xmm9
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm9, %xmm9
; AVX512-NEXT:    cmoval %ecx, %edi
; AVX512-NEXT:    vpinsrd $2, %edi, %xmm9, %xmm9
; AVX512-NEXT:    vpsrlq $48, %xmm0, %xmm0
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vcvttss2usi %xmm0, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm9, %xmm9
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm6[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vcvttss2usi %xmm0, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm0 = xmm6[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vcvttss2usi %xmm0, %esi
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vshufps {{.*#+}} xmm0 = xmm6[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vcvttss2usi %xmm0, %edi
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %edi
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    cmoval %ecx, %edi
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm6[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vcvttss2usi %xmm0, %r8d
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %r8d
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    vmovd %esi, %xmm0
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm0, %xmm0
; AVX512-NEXT:    vpinsrd $2, %edi, %xmm0, %xmm0
; AVX512-NEXT:    cmoval %ecx, %r8d
; AVX512-NEXT:    vinserti128 $1, %xmm3, %ymm4, %ymm3
; AVX512-NEXT:    vpinsrd $3, %r8d, %xmm0, %xmm4
; AVX512-NEXT:    vpsrld $16, %xmm6, %xmm0
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vinserti128 $1, %xmm5, %ymm7, %ymm5
; AVX512-NEXT:    vcvttss2usi %xmm0, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm0
; AVX512-NEXT:    vcvttss2usi %xmm0, %esi
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %esi
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    cmoval %ecx, %esi
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm6[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vcvttss2usi %xmm0, %edi
; AVX512-NEXT:    vucomiss %xmm1, %xmm0
; AVX512-NEXT:    cmovbl %eax, %edi
; AVX512-NEXT:    vucomiss %xmm2, %xmm0
; AVX512-NEXT:    vmovd %esi, %xmm0
; AVX512-NEXT:    vpinsrd $1, %edx, %xmm0, %xmm7
; AVX512-NEXT:    cmoval %ecx, %edi
; AVX512-NEXT:    vinserti64x4 $1, %ymm3, %zmm5, %zmm0
; AVX512-NEXT:    vpinsrd $2, %edi, %xmm7, %xmm3
; AVX512-NEXT:    vpsrlq $48, %xmm6, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vinserti128 $1, %xmm8, %ymm9, %ymm6
; AVX512-NEXT:    vcvttss2usi %xmm5, %edx
; AVX512-NEXT:    vucomiss %xmm1, %xmm5
; AVX512-NEXT:    cmovbl %eax, %edx
; AVX512-NEXT:    vucomiss %xmm2, %xmm5
; AVX512-NEXT:    cmoval %ecx, %edx
; AVX512-NEXT:    vpinsrd $3, %edx, %xmm3, %xmm1
; AVX512-NEXT:    vinserti128 $1, %xmm4, %ymm1, %ymm1
; AVX512-NEXT:    vinserti64x4 $1, %ymm6, %zmm1, %zmm1
; AVX512-NEXT:    retq
  %x = call <32 x i32> @llvm.fptoui.sat.v32i32.v32f16(<32 x half> %f)
  ret <32 x i32> %x
}

define <32 x i64> @test_unsigned_v32i64_v32f16(<32 x half> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v32i64_v32f16:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vmovdqa64 %zmm0, %zmm2
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vcvttss2usi %xmm0, %rdx
; AVX512F-NEXT:    xorl %eax, %eax
; AVX512F-NEXT:    vxorps %xmm3, %xmm3, %xmm3
; AVX512F-NEXT:    vucomiss %xmm3, %xmm0
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vmovss {{.*#+}} xmm4 = [1.8446743E+19,0.0E+0,0.0E+0,0.0E+0]
; AVX512F-NEXT:    vucomiss %xmm4, %xmm0
; AVX512F-NEXT:    movq $-1, %rcx
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vcvttss2usi %xmm0, %rsi
; AVX512F-NEXT:    vucomiss %xmm3, %xmm0
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm0
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm0
; AVX512F-NEXT:    vmovq %rsi, %xmm1
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm2[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm5 = xmm2[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rsi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512F-NEXT:    vucomiss %xmm3, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm1
; AVX512F-NEXT:    vmovq %rsi, %xmm5
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm5[0],xmm1[0]
; AVX512F-NEXT:    vpsrlq $48, %xmm2, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm2[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rsi
; AVX512F-NEXT:    vinserti128 $1, %xmm0, %ymm1, %ymm0
; AVX512F-NEXT:    vucomiss %xmm3, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vcvtph2ps %xmm2, %xmm1
; AVX512F-NEXT:    vcvttss2usi %xmm1, %rdi
; AVX512F-NEXT:    vmovq %rdx, %xmm5
; AVX512F-NEXT:    vucomiss %xmm3, %xmm1
; AVX512F-NEXT:    cmovbq %rax, %rdi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm1
; AVX512F-NEXT:    cmovaq %rcx, %rdi
; AVX512F-NEXT:    vmovq %rsi, %xmm1
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm5[0]
; AVX512F-NEXT:    vmovq %rdi, %xmm5
; AVX512F-NEXT:    vpsrld $16, %xmm2, %xmm6
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vmovq %rdx, %xmm6
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm6[0]
; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm5, %ymm5
; AVX512F-NEXT:    vextracti128 $1, %ymm2, %xmm1
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpshufd {{.*#+}} xmm6 = xmm1[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %rsi
; AVX512F-NEXT:    vinserti64x4 $1, %ymm0, %zmm5, %zmm0
; AVX512F-NEXT:    vucomiss %xmm3, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm5
; AVX512F-NEXT:    vmovq %rsi, %xmm6
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm6[0],xmm5[0]
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm1[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm6 = xmm1[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm7
; AVX512F-NEXT:    vucomiss %xmm3, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovq %rsi, %xmm6
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm7[0]
; AVX512F-NEXT:    vinserti128 $1, %xmm5, %ymm6, %ymm5
; AVX512F-NEXT:    vpsrlq $48, %xmm1, %xmm6
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm1[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm7
; AVX512F-NEXT:    vucomiss %xmm3, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vcvtph2ps %xmm1, %xmm6
; AVX512F-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm6
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm6
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpsrld $16, %xmm1, %xmm1
; AVX512F-NEXT:    vcvtph2ps %xmm1, %xmm1
; AVX512F-NEXT:    vcvttss2usi %xmm1, %rdi
; AVX512F-NEXT:    vmovq %rsi, %xmm6
; AVX512F-NEXT:    vucomiss %xmm3, %xmm1
; AVX512F-NEXT:    cmovbq %rax, %rdi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm1
; AVX512F-NEXT:    cmovaq %rcx, %rdi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm6[0],xmm7[0]
; AVX512F-NEXT:    vmovq %rdx, %xmm6
; AVX512F-NEXT:    vmovq %rdi, %xmm7
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm7[0]
; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm6, %ymm1
; AVX512F-NEXT:    vinserti64x4 $1, %ymm5, %zmm1, %zmm1
; AVX512F-NEXT:    vextracti64x4 $1, %zmm2, %ymm2
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpshufd {{.*#+}} xmm5 = xmm2[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rsi
; AVX512F-NEXT:    vucomiss %xmm3, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm2[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rdi
; AVX512F-NEXT:    vmovq %rdx, %xmm6
; AVX512F-NEXT:    vucomiss %xmm3, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rdi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rdi
; AVX512F-NEXT:    vmovq %rsi, %xmm5
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm6[0]
; AVX512F-NEXT:    vmovq %rdi, %xmm6
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm7 = xmm2[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512F-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm7
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm7
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpsrlq $48, %xmm2, %xmm7
; AVX512F-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512F-NEXT:    vcvttss2usi %xmm7, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm8
; AVX512F-NEXT:    vucomiss %xmm3, %xmm7
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm7
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm8[0],xmm6[0]
; AVX512F-NEXT:    vinserti128 $1, %xmm5, %ymm6, %ymm6
; AVX512F-NEXT:    vmovq %rsi, %xmm5
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm7 = xmm2[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512F-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm7
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm7
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vmovq %rdx, %xmm7
; AVX512F-NEXT:    vcvtph2ps %xmm2, %xmm8
; AVX512F-NEXT:    vcvttss2usi %xmm8, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm8
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm8
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpsrld $16, %xmm2, %xmm8
; AVX512F-NEXT:    vcvtph2ps %xmm8, %xmm8
; AVX512F-NEXT:    vcvttss2usi %xmm8, %rsi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm5[0]
; AVX512F-NEXT:    vucomiss %xmm3, %xmm8
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm8
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm8
; AVX512F-NEXT:    vmovq %rsi, %xmm9
; AVX512F-NEXT:    vextracti128 $1, %ymm2, %xmm5
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm2 = xmm5[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm2, %xmm2
; AVX512F-NEXT:    vcvttss2usi %xmm2, %rdx
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm8 = xmm8[0],xmm9[0]
; AVX512F-NEXT:    vucomiss %xmm3, %xmm2
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm2
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vinserti128 $1, %xmm7, %ymm8, %ymm2
; AVX512F-NEXT:    vinserti64x4 $1, %ymm6, %zmm2, %zmm2
; AVX512F-NEXT:    vmovq %rdx, %xmm6
; AVX512F-NEXT:    vpshufd {{.*#+}} xmm7 = xmm5[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512F-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm7
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm7
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm7 = xmm5[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512F-NEXT:    vcvttss2usi %xmm7, %rsi
; AVX512F-NEXT:    vucomiss %xmm3, %xmm7
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm7
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vshufpd {{.*#+}} xmm7 = xmm5[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512F-NEXT:    vcvttss2usi %xmm7, %rdi
; AVX512F-NEXT:    vmovq %rdx, %xmm8
; AVX512F-NEXT:    vucomiss %xmm3, %xmm7
; AVX512F-NEXT:    cmovbq %rax, %rdi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm7
; AVX512F-NEXT:    cmovaq %rcx, %rdi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm8[0],xmm6[0]
; AVX512F-NEXT:    vmovq %rsi, %xmm7
; AVX512F-NEXT:    vmovq %rdi, %xmm8
; AVX512F-NEXT:    vpsrlq $48, %xmm5, %xmm9
; AVX512F-NEXT:    vcvtph2ps %xmm9, %xmm9
; AVX512F-NEXT:    vcvttss2usi %xmm9, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm9
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm9
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vmovshdup {{.*#+}} xmm9 = xmm5[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm9, %xmm9
; AVX512F-NEXT:    vcvttss2usi %xmm9, %rsi
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm7 = xmm8[0],xmm7[0]
; AVX512F-NEXT:    vucomiss %xmm3, %xmm9
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm9
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vinserti128 $1, %xmm6, %ymm7, %ymm6
; AVX512F-NEXT:    vmovq %rdx, %xmm7
; AVX512F-NEXT:    vmovq %rsi, %xmm8
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm7 = xmm8[0],xmm7[0]
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm8
; AVX512F-NEXT:    vcvttss2usi %xmm8, %rdx
; AVX512F-NEXT:    vucomiss %xmm3, %xmm8
; AVX512F-NEXT:    cmovbq %rax, %rdx
; AVX512F-NEXT:    vucomiss %xmm4, %xmm8
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    vpsrld $16, %xmm5, %xmm5
; AVX512F-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512F-NEXT:    vcvttss2usi %xmm5, %rsi
; AVX512F-NEXT:    vmovq %rdx, %xmm8
; AVX512F-NEXT:    vucomiss %xmm3, %xmm5
; AVX512F-NEXT:    cmovbq %rax, %rsi
; AVX512F-NEXT:    vucomiss %xmm4, %xmm5
; AVX512F-NEXT:    cmovaq %rcx, %rsi
; AVX512F-NEXT:    vmovq %rsi, %xmm3
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm3 = xmm8[0],xmm3[0]
; AVX512F-NEXT:    vinserti128 $1, %xmm7, %ymm3, %ymm3
; AVX512F-NEXT:    vinserti64x4 $1, %ymm6, %zmm3, %zmm3
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v32i64_v32f16:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vmovapd %zmm0, %zmm2
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vcvttss2usi %xmm0, %rdx
; AVX512-NEXT:    xorl %eax, %eax
; AVX512-NEXT:    vxorps %xmm3, %xmm3, %xmm3
; AVX512-NEXT:    vucomiss %xmm3, %xmm0
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vmovss {{.*#+}} xmm4 = [1.8446743E+19,0.0E+0,0.0E+0,0.0E+0]
; AVX512-NEXT:    vucomiss %xmm4, %xmm0
; AVX512-NEXT:    movq $-1, %rcx
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm0
; AVX512-NEXT:    vshufps {{.*#+}} xmm1 = xmm2[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT:    vcvttss2usi %xmm1, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm1
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm1
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm1
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm5 = xmm2[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm1 = xmm2[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT:    vmovq %rdx, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm1, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm1
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm1
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm1
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm5[0]
; AVX512-NEXT:    vinserti128 $1, %xmm0, %ymm1, %ymm0
; AVX512-NEXT:    vpsrlq $48, %xmm2, %xmm1
; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT:    vcvttss2usi %xmm1, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm1
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm1
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm1
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm2[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm5
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm5[0],xmm1[0]
; AVX512-NEXT:    vcvtph2ps %xmm2, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm5
; AVX512-NEXT:    vpsrld $16, %xmm2, %xmm6
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm6
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm6
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm6[0]
; AVX512-NEXT:    vinserti128 $1, %xmm1, %ymm5, %ymm5
; AVX512-NEXT:    vextractf128 $1, %ymm2, %xmm1
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vinserti64x4 $1, %ymm0, %zmm5, %zmm0
; AVX512-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm6
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm6
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vshufps {{.*#+}} xmm5 = xmm1[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm5
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm6[0]
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm1[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm6
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm6
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vshufpd {{.*#+}} xmm7 = xmm1[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm7
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm7
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm7
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm7[0],xmm6[0]
; AVX512-NEXT:    vpsrlq $48, %xmm1, %xmm7
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512-NEXT:    vinserti128 $1, %xmm5, %ymm6, %ymm5
; AVX512-NEXT:    vucomiss %xmm3, %xmm7
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm7
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm6 = xmm1[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm7
; AVX512-NEXT:    vucomiss %xmm3, %xmm6
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomiss %xmm4, %xmm6
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vmovq %rsi, %xmm6
; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm8
; AVX512-NEXT:    vcvttss2usi %xmm8, %rdx
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm7[0]
; AVX512-NEXT:    vucomiss %xmm3, %xmm8
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm8
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vpsrld $16, %xmm1, %xmm1
; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT:    vcvttss2usi %xmm1, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm7
; AVX512-NEXT:    vucomiss %xmm3, %xmm1
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomiss %xmm4, %xmm1
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vmovq %rsi, %xmm1
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm7[0],xmm1[0]
; AVX512-NEXT:    vinserti128 $1, %xmm6, %ymm1, %ymm1
; AVX512-NEXT:    vinserti64x4 $1, %ymm5, %zmm1, %zmm1
; AVX512-NEXT:    vextractf64x4 $1, %zmm2, %ymm5
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm2 = xmm5[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm2, %xmm2
; AVX512-NEXT:    vcvttss2usi %xmm2, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm2
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm2
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm2
; AVX512-NEXT:    vshufps {{.*#+}} xmm6 = xmm5[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm6
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm6
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm2 = xmm6[0],xmm2[0]
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm5[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm6
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm6
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vshufpd {{.*#+}} xmm7 = xmm5[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm7
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm7
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm7
; AVX512-NEXT:    vpsrlq $48, %xmm5, %xmm8
; AVX512-NEXT:    vcvtph2ps %xmm8, %xmm8
; AVX512-NEXT:    vcvttss2usi %xmm8, %rdx
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm7[0],xmm6[0]
; AVX512-NEXT:    vucomiss %xmm3, %xmm8
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm8
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm7 = xmm5[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %rsi
; AVX512-NEXT:    vinserti128 $1, %xmm2, %ymm6, %ymm2
; AVX512-NEXT:    vucomiss %xmm3, %xmm7
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomiss %xmm4, %xmm7
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512-NEXT:    vmovq %rsi, %xmm8
; AVX512-NEXT:    vucomiss %xmm3, %xmm7
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm7
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vpsrld $16, %xmm5, %xmm7
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %rsi
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm8[0],xmm6[0]
; AVX512-NEXT:    vucomiss %xmm3, %xmm7
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomiss %xmm4, %xmm7
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm7
; AVX512-NEXT:    vmovq %rsi, %xmm8
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm8[0]
; AVX512-NEXT:    vinserti128 $1, %xmm6, %ymm7, %ymm6
; AVX512-NEXT:    vinserti64x4 $1, %ymm2, %zmm6, %zmm2
; AVX512-NEXT:    vextractf128 $1, %ymm5, %xmm5
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm6 = xmm5[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
; AVX512-NEXT:    vcvttss2usi %xmm6, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm6
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm6
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm6
; AVX512-NEXT:    vshufps {{.*#+}} xmm7 = xmm5[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm7
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm7
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm7
; AVX512-NEXT:    vpsrldq {{.*#+}} xmm8 = xmm5[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm8, %xmm8
; AVX512-NEXT:    vcvttss2usi %xmm8, %rdx
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm6 = xmm7[0],xmm6[0]
; AVX512-NEXT:    vucomiss %xmm3, %xmm8
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm8
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vshufpd {{.*#+}} xmm7 = xmm5[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %rsi
; AVX512-NEXT:    vmovq %rdx, %xmm8
; AVX512-NEXT:    vucomiss %xmm3, %xmm7
; AVX512-NEXT:    cmovbq %rax, %rsi
; AVX512-NEXT:    vucomiss %xmm4, %xmm7
; AVX512-NEXT:    cmovaq %rcx, %rsi
; AVX512-NEXT:    vmovq %rsi, %xmm7
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm8[0]
; AVX512-NEXT:    vinserti128 $1, %xmm6, %ymm7, %ymm6
; AVX512-NEXT:    vpsrlq $48, %xmm5, %xmm7
; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT:    vcvttss2usi %xmm7, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm7
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm7
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm7
; AVX512-NEXT:    vmovshdup {{.*#+}} xmm8 = xmm5[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm8, %xmm8
; AVX512-NEXT:    vcvttss2usi %xmm8, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm8
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm8
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm8
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm7 = xmm8[0],xmm7[0]
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm8
; AVX512-NEXT:    vcvttss2usi %xmm8, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm8
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm8
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm8
; AVX512-NEXT:    vpsrld $16, %xmm5, %xmm5
; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT:    vcvttss2usi %xmm5, %rdx
; AVX512-NEXT:    vucomiss %xmm3, %xmm5
; AVX512-NEXT:    cmovbq %rax, %rdx
; AVX512-NEXT:    vucomiss %xmm4, %xmm5
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    vmovq %rdx, %xmm3
; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm3 = xmm8[0],xmm3[0]
; AVX512-NEXT:    vinserti128 $1, %xmm7, %ymm3, %ymm3
; AVX512-NEXT:    vinserti64x4 $1, %ymm6, %zmm3, %zmm3
; AVX512-NEXT:    retq
  %x = call <32 x i64> @llvm.fptoui.sat.v32i64.v32f16(<32 x half> %f)
  ret <32 x i64> %x
}

define <32 x i128> @test_unsigned_v32i128_v32f16(<32 x half> %f) nounwind {
; AVX512F-LABEL: test_unsigned_v32i128_v32f16:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    pushq %rbp
; AVX512F-NEXT:    pushq %r15
; AVX512F-NEXT:    pushq %r14
; AVX512F-NEXT:    pushq %r13
; AVX512F-NEXT:    pushq %r12
; AVX512F-NEXT:    pushq %rbx
; AVX512F-NEXT:    subq $648, %rsp # imm = 0x288
; AVX512F-NEXT:    vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512F-NEXT:    movq %rdi, %rbx
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm1
; AVX512F-NEXT:    vcvtph2ps %xmm1, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    xorl %r14d, %r14d
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    movq $-1, %r15
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm0
; AVX512F-NEXT:    vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vmovdqa %xmm0, (%rsp) # 16-byte Spill
; AVX512F-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovshdup (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,1,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    vpsrlq $48, %xmm0, %xmm0
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilpd $1, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[1,0]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vpermilps $255, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload
; AVX512F-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rdx
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %rdx
; AVX512F-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    vcvtph2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    movq %rdx, %r12
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %r12
; AVX512F-NEXT:    cmovbq %r14, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %rax
; AVX512F-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512F-NEXT:    cmovaq %r15, %r12
; AVX512F-NEXT:    vcvtph2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    movq %rax, %r13
; AVX512F-NEXT:    movq %rdx, %rbp
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    cmovbq %r14, %rbp
; AVX512F-NEXT:    cmovbq %r14, %r13
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    cmovaq %r15, %r13
; AVX512F-NEXT:    cmovaq %r15, %rbp
; AVX512F-NEXT:    vcvtph2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    movq %rax, %r14
; AVX512F-NEXT:    movq %rdx, %r15
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    movl $0, %eax
; AVX512F-NEXT:    cmovbq %rax, %r15
; AVX512F-NEXT:    cmovbq %rax, %r14
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    movq $-1, %rax
; AVX512F-NEXT:    cmovaq %rax, %r14
; AVX512F-NEXT:    cmovaq %rax, %r15
; AVX512F-NEXT:    vcvtph2ps (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512F-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512F-NEXT:    callq __fixunssfti@PLT
; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512F-NEXT:    vucomiss %xmm0, %xmm1
; AVX512F-NEXT:    movl $0, %ecx
; AVX512F-NEXT:    cmovbq %rcx, %rdx
; AVX512F-NEXT:    cmovbq %rcx, %rax
; AVX512F-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512F-NEXT:    movq $-1, %rcx
; AVX512F-NEXT:    cmovaq %rcx, %rax
; AVX512F-NEXT:    cmovaq %rcx, %rdx
; AVX512F-NEXT:    movq %rdx, 392(%rbx)
; AVX512F-NEXT:    movq %rax, 384(%rbx)
; AVX512F-NEXT:    movq %r15, 264(%rbx)
; AVX512F-NEXT:    movq %r14, 256(%rbx)
; AVX512F-NEXT:    movq %rbp, 136(%rbx)
; AVX512F-NEXT:    movq %r13, 128(%rbx)
; AVX512F-NEXT:    movq %r12, 8(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, (%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 504(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 496(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 488(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 480(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 472(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 464(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 456(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 448(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 440(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 432(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 424(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 416(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 408(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 400(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 376(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 368(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 360(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 352(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 344(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 336(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 328(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 320(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 312(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 304(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 296(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 288(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 280(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 272(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 248(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 240(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 232(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 224(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 216(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 208(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 200(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 192(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 184(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 176(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 168(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 160(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 152(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 144(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 120(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 112(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 104(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 96(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 88(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 80(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 72(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 64(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 56(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 48(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 40(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 32(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 24(%rbx)
; AVX512F-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512F-NEXT:    movq %rax, 16(%rbx)
; AVX512F-NEXT:    movq %rbx, %rax
; AVX512F-NEXT:    addq $648, %rsp # imm = 0x288
; AVX512F-NEXT:    popq %rbx
; AVX512F-NEXT:    popq %r12
; AVX512F-NEXT:    popq %r13
; AVX512F-NEXT:    popq %r14
; AVX512F-NEXT:    popq %r15
; AVX512F-NEXT:    popq %rbp
; AVX512F-NEXT:    retq
;
; AVX512-LABEL: test_unsigned_v32i128_v32f16:
; AVX512:       # %bb.0:
; AVX512-NEXT:    pushq %rbp
; AVX512-NEXT:    pushq %r15
; AVX512-NEXT:    pushq %r14
; AVX512-NEXT:    pushq %r13
; AVX512-NEXT:    pushq %r12
; AVX512-NEXT:    pushq %rbx
; AVX512-NEXT:    subq $648, %rsp # imm = 0x288
; AVX512-NEXT:    vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT:    movq %rdi, %rbx
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm1
; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    xorl %r14d, %r14d
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    movq $-1, %r15
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrlq $48, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrldq $10, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrldq $14, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrlq $48, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrldq $10, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrldq $14, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT:    vextracti64x4 $1, %zmm0, %ymm0
; AVX512-NEXT:    vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrlq $48, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrldq $10, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrldq $14, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm0
; AVX512-NEXT:    vmovdqa %xmm0, (%rsp) # 16-byte Spill
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vmovshdup (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,1,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrlq $48, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilpd $1, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[1,0]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrldq $10, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpermilps $255, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[3,3,3,3]
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vpsrldq $14, (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    # xmm0 = mem[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rdx
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %rdx
; AVX512-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    vcvtph2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    movq %rdx, %r12
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %r12
; AVX512-NEXT:    cmovbq %r14, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %rax
; AVX512-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; AVX512-NEXT:    cmovaq %r15, %r12
; AVX512-NEXT:    vcvtph2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    movq %rax, %r13
; AVX512-NEXT:    movq %rdx, %rbp
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    cmovbq %r14, %rbp
; AVX512-NEXT:    cmovbq %r14, %r13
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    cmovaq %r15, %r13
; AVX512-NEXT:    cmovaq %r15, %rbp
; AVX512-NEXT:    vcvtph2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    movq %rax, %r14
; AVX512-NEXT:    movq %rdx, %r15
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    movl $0, %eax
; AVX512-NEXT:    cmovbq %rax, %r15
; AVX512-NEXT:    cmovbq %rax, %r14
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    movq $-1, %rax
; AVX512-NEXT:    cmovaq %rax, %r14
; AVX512-NEXT:    cmovaq %rax, %r15
; AVX512-NEXT:    vcvtph2ps (%rsp), %xmm0 # 16-byte Folded Reload
; AVX512-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT:    callq __fixunssfti@PLT
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT:    vucomiss %xmm0, %xmm1
; AVX512-NEXT:    movl $0, %ecx
; AVX512-NEXT:    cmovbq %rcx, %rdx
; AVX512-NEXT:    cmovbq %rcx, %rax
; AVX512-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT:    movq $-1, %rcx
; AVX512-NEXT:    cmovaq %rcx, %rax
; AVX512-NEXT:    cmovaq %rcx, %rdx
; AVX512-NEXT:    movq %rdx, 392(%rbx)
; AVX512-NEXT:    movq %rax, 384(%rbx)
; AVX512-NEXT:    movq %r15, 264(%rbx)
; AVX512-NEXT:    movq %r14, 256(%rbx)
; AVX512-NEXT:    movq %rbp, 136(%rbx)
; AVX512-NEXT:    movq %r13, 128(%rbx)
; AVX512-NEXT:    movq %r12, 8(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, (%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 504(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 496(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 488(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 480(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 472(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 464(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 456(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 448(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 440(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 432(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 424(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 416(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 408(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 400(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 376(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 368(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 360(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 352(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 344(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 336(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 328(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 320(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 312(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 304(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 296(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 288(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 280(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 272(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 248(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 240(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 232(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 224(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 216(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 208(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 200(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 192(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 184(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 176(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 168(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 160(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 152(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 144(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 120(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 112(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 104(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 96(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 88(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 80(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 72(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 64(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 56(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 48(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 40(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 32(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 24(%rbx)
; AVX512-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; AVX512-NEXT:    movq %rax, 16(%rbx)
; AVX512-NEXT:    movq %rbx, %rax
; AVX512-NEXT:    addq $648, %rsp # imm = 0x288
; AVX512-NEXT:    popq %rbx
; AVX512-NEXT:    popq %r12
; AVX512-NEXT:    popq %r13
; AVX512-NEXT:    popq %r14
; AVX512-NEXT:    popq %r15
; AVX512-NEXT:    popq %rbp
; AVX512-NEXT:    retq
  %x = call <32 x i128> @llvm.fptoui.sat.v32i128.v32f16(<32 x half> %f)
  ret <32 x i128> %x
}