clang/test/CodeGenHLSL/builtins/length.hlsl

// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
// RUN: %clang_cc1 -finclude-default-header -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -O1 -o - | FileCheck %s

// CHECK-LABEL: define noundef nofpclass(nan inf) half @_Z16test_length_halfDh(
// CHECK-SAME: half noundef nofpclass(nan inf) [[P0:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
// CHECK-NEXT:  [[ENTRY:.*:]]
// CHECK-NEXT:    [[ELT_ABS_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn noundef half @llvm.fabs.f16(half [[P0]])
// CHECK-NEXT:    ret half [[ELT_ABS_I]]
//
half test_length_half(half p0)
{
  return length(p0);
}

// CHECK-LABEL: define noundef nofpclass(nan inf) half @_Z17test_length_half2Dv2_Dh(
// CHECK-SAME: <2 x half> noundef nofpclass(nan inf) [[P0:%.*]]) local_unnamed_addr #[[ATTR0]] {
// CHECK-NEXT:  [[ENTRY:.*:]]
// CHECK-NEXT:    [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn <2 x half> [[P0]], [[P0]]
// CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <2 x half> [[MUL_I]], i64 0
// CHECK-NEXT:    [[VECEXT1_I:%.*]] = extractelement <2 x half> [[MUL_I]], i64 1
// CHECK-NEXT:    [[ADD_I:%.*]] = fadd reassoc nnan ninf nsz arcp afn half [[VECEXT_I]], [[VECEXT1_I]]
// CHECK-NEXT:    [[TMP0:%.*]] = tail call reassoc nnan ninf nsz arcp afn noundef half @llvm.sqrt.f16(half [[ADD_I]])
// CHECK-NEXT:    ret half [[TMP0]]
//
half test_length_half2(half2 p0)
{
  return length(p0);
}

// CHECK-LABEL: define noundef nofpclass(nan inf) half @_Z17test_length_half3Dv3_Dh(
// CHECK-SAME: <3 x half> noundef nofpclass(nan inf) [[P0:%.*]]) local_unnamed_addr #[[ATTR0]] {
// CHECK-NEXT:  [[ENTRY:.*:]]
// CHECK-NEXT:    [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn <3 x half> [[P0]], [[P0]]
// CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <3 x half> [[MUL_I]], i64 0
// CHECK-NEXT:    [[VECEXT1_I:%.*]] = extractelement <3 x half> [[MUL_I]], i64 1
// CHECK-NEXT:    [[ADD_I:%.*]] = fadd reassoc nnan ninf nsz arcp afn half [[VECEXT1_I]], [[VECEXT_I]]
// CHECK-NEXT:    [[VECEXT1_I_1:%.*]] = extractelement <3 x half> [[MUL_I]], i64 2
// CHECK-NEXT:    [[ADD_I_1:%.*]] = fadd reassoc nnan ninf nsz arcp afn half [[VECEXT1_I_1]], [[ADD_I]]
// CHECK-NEXT:    [[TMP0:%.*]] = tail call reassoc nnan ninf nsz arcp afn noundef half @llvm.sqrt.f16(half [[ADD_I_1]])
// CHECK-NEXT:    ret half [[TMP0]]
//
half test_length_half3(half3 p0)
{
  return length(p0);
}

// CHECK-LABEL: define noundef nofpclass(nan inf) half @_Z17test_length_half4Dv4_Dh(
// CHECK-SAME: <4 x half> noundef nofpclass(nan inf) [[P0:%.*]]) local_unnamed_addr #[[ATTR0]] {
// CHECK-NEXT:  [[ENTRY:.*:]]
// CHECK-NEXT:    [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn <4 x half> [[P0]], [[P0]]
// CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <4 x half> [[MUL_I]], i64 0
// CHECK-NEXT:    [[VECEXT1_I:%.*]] = extractelement <4 x half> [[MUL_I]], i64 1
// CHECK-NEXT:    [[ADD_I:%.*]] = fadd reassoc nnan ninf nsz arcp afn half [[VECEXT1_I]], [[VECEXT_I]]
// CHECK-NEXT:    [[VECEXT1_I_1:%.*]] = extractelement <4 x half> [[MUL_I]], i64 2
// CHECK-NEXT:    [[ADD_I_1:%.*]] = fadd reassoc nnan ninf nsz arcp afn half [[VECEXT1_I_1]], [[ADD_I]]
// CHECK-NEXT:    [[VECEXT1_I_2:%.*]] = extractelement <4 x half> [[MUL_I]], i64 3
// CHECK-NEXT:    [[ADD_I_2:%.*]] = fadd reassoc nnan ninf nsz arcp afn half [[VECEXT1_I_2]], [[ADD_I_1]]
// CHECK-NEXT:    [[TMP0:%.*]] = tail call reassoc nnan ninf nsz arcp afn noundef half @llvm.sqrt.f16(half [[ADD_I_2]])
// CHECK-NEXT:    ret half [[TMP0]]
//
half test_length_half4(half4 p0)
{
  return length(p0);
}


// CHECK-LABEL: define noundef nofpclass(nan inf) float @_Z17test_length_floatf(
// CHECK-SAME: float noundef nofpclass(nan inf) [[P0:%.*]]) local_unnamed_addr #[[ATTR0]] {
// CHECK-NEXT:  [[ENTRY:.*:]]
// CHECK-NEXT:    [[ELT_ABS_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn noundef float @llvm.fabs.f32(float [[P0]])
// CHECK-NEXT:    ret float [[ELT_ABS_I]]
//
float test_length_float(float p0)
{
  return length(p0);
}

// CHECK-LABEL: define noundef nofpclass(nan inf) float @_Z18test_length_float2Dv2_f(
// CHECK-SAME: <2 x float> noundef nofpclass(nan inf) [[P0:%.*]]) local_unnamed_addr #[[ATTR0]] {
// CHECK-NEXT:  [[ENTRY:.*:]]
// CHECK-NEXT:    [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn <2 x float> [[P0]], [[P0]]
// CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <2 x float> [[MUL_I]], i64 0
// CHECK-NEXT:    [[VECEXT1_I:%.*]] = extractelement <2 x float> [[MUL_I]], i64 1
// CHECK-NEXT:    [[ADD_I:%.*]] = fadd reassoc nnan ninf nsz arcp afn float [[VECEXT_I]], [[VECEXT1_I]]
// CHECK-NEXT:    [[TMP0:%.*]] = tail call reassoc nnan ninf nsz arcp afn noundef float @llvm.sqrt.f32(float [[ADD_I]])
// CHECK-NEXT:    ret float [[TMP0]]
//
float test_length_float2(float2 p0)
{
  return length(p0);
}

// CHECK-LABEL: define noundef nofpclass(nan inf) float @_Z18test_length_float3Dv3_f(
// CHECK-SAME: <3 x float> noundef nofpclass(nan inf) [[P0:%.*]]) local_unnamed_addr #[[ATTR0]] {
// CHECK-NEXT:  [[ENTRY:.*:]]
// CHECK-NEXT:    [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn <3 x float> [[P0]], [[P0]]
// CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <3 x float> [[MUL_I]], i64 0
// CHECK-NEXT:    [[VECEXT1_I:%.*]] = extractelement <3 x float> [[MUL_I]], i64 1
// CHECK-NEXT:    [[ADD_I:%.*]] = fadd reassoc nnan ninf nsz arcp afn float [[VECEXT1_I]], [[VECEXT_I]]
// CHECK-NEXT:    [[VECEXT1_I_1:%.*]] = extractelement <3 x float> [[MUL_I]], i64 2
// CHECK-NEXT:    [[ADD_I_1:%.*]] = fadd reassoc nnan ninf nsz arcp afn float [[VECEXT1_I_1]], [[ADD_I]]
// CHECK-NEXT:    [[TMP0:%.*]] = tail call reassoc nnan ninf nsz arcp afn noundef float @llvm.sqrt.f32(float [[ADD_I_1]])
// CHECK-NEXT:    ret float [[TMP0]]
//
float test_length_float3(float3 p0)
{
  return length(p0);
}


// CHECK-LABEL: define noundef nofpclass(nan inf) float @_Z18test_length_float4Dv4_f(
// CHECK-SAME: <4 x float> noundef nofpclass(nan inf) [[P0:%.*]]) local_unnamed_addr #[[ATTR0]] {
// CHECK-NEXT:  [[ENTRY:.*:]]
// CHECK-NEXT:    [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn <4 x float> [[P0]], [[P0]]
// CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <4 x float> [[MUL_I]], i64 0
// CHECK-NEXT:    [[VECEXT1_I:%.*]] = extractelement <4 x float> [[MUL_I]], i64 1
// CHECK-NEXT:    [[ADD_I:%.*]] = fadd reassoc nnan ninf nsz arcp afn float [[VECEXT1_I]], [[VECEXT_I]]
// CHECK-NEXT:    [[VECEXT1_I_1:%.*]] = extractelement <4 x float> [[MUL_I]], i64 2
// CHECK-NEXT:    [[ADD_I_1:%.*]] = fadd reassoc nnan ninf nsz arcp afn float [[VECEXT1_I_1]], [[ADD_I]]
// CHECK-NEXT:    [[VECEXT1_I_2:%.*]] = extractelement <4 x float> [[MUL_I]], i64 3
// CHECK-NEXT:    [[ADD_I_2:%.*]] = fadd reassoc nnan ninf nsz arcp afn float [[VECEXT1_I_2]], [[ADD_I_1]]
// CHECK-NEXT:    [[TMP0:%.*]] = tail call reassoc nnan ninf nsz arcp afn noundef float @llvm.sqrt.f32(float [[ADD_I_2]])
// CHECK-NEXT:    ret float [[TMP0]]
//
float test_length_float4(float4 p0)
{
  return length(p0);
}