blob: 22af7927082111faafdb6d92fbbc134d6bb7beb6 [file] [edit]
; RUN: %if x86-registered-target %{ opt -S -passes=declare-runtime-libcalls -mtriple=x86_64-unknown-linux -vector-library=LIBMVEC < %s | FileCheck -check-prefix=X86 %s %}
; RUN: %if aarch64-registered-target %{ opt -S -passes=declare-runtime-libcalls -mtriple=aarch64-unknown-linux -mattr=+neon,+sve -vector-library=LIBMVEC < %s | FileCheck -check-prefix=AARCH64 %s %}
; X86: declare <2 x double> @_ZGVbN2v___exp_finite(<2 x double>) [[ATTRS:#[0-9]+]]
; X86: declare <2 x double> @_ZGVbN2v___log_finite(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_acosh(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_asinh(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_atanh(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_cbrt(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_cos(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_erf(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_erfc(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_exp(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_expm1(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_log(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_log1p(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_sin(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2v_tan(<2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2vv___pow_finite(<2 x double>, <2 x double>) [[ATTRS]]
; X86: declare <2 x double> @_ZGVbN2vv_pow(<2 x double>, <2 x double>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v___expf_finite(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v___logf_finite(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_acoshf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_asinhf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_atanhf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_cbrtf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_cosf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_erfcf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_erff(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_expf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_expm1f(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_log1pf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_logf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_sinf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4v_tanf(<4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4vv___powf_finite(<4 x float>, <4 x float>) [[ATTRS]]
; X86: declare <4 x float> @_ZGVbN4vv_powf(<4 x float>, <4 x float>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v___exp_finite(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v___log_finite(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_acosh(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_asinh(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_atanh(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_cbrt(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_cos(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_erf(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_erfc(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_exp(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_expm1(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_log(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_log1p(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_sin(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4v_tan(<4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4vv___pow_finite(<4 x double>, <4 x double>) [[ATTRS]]
; X86: declare <4 x double> @_ZGVdN4vv_pow(<4 x double>, <4 x double>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v___expf_finite(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v___logf_finite(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_acoshf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_asinhf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_atanhf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_cbrtf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_cosf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_erfcf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_erff(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_expf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_expm1f(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_log1pf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_logf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_sinf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8v_tanf(<8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8vv___powf_finite(<8 x float>, <8 x float>) [[ATTRS]]
; X86: declare <8 x float> @_ZGVdN8vv_powf(<8 x float>, <8 x float>) [[ATTRS]]
; X86: attributes [[ATTRS]] = { nocallback nofree nosync nounwind willreturn }
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_acos(<2 x double>) [[ATTRS:#[0-9]+]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_acosf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_acosh(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_acoshf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_asin(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_asinf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_asinh(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_asinhf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_atan(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_atanf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_atanh(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_atanhf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_cbrt(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_cbrtf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_cos(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_cosf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_cosh(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_coshf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_erf(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_erfc(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_erfcf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_erff(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_exp(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_exp10(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_exp10f(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_exp2(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_exp2f(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_expf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_expm1(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_expm1f(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_log(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_log10(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_log10f(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_log1p(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_log1pf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_log2(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_log2f(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_logf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_sin(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_sinf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_sinh(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_sinhf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_tan(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_tanf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2v_tanh(<2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2v_tanhf(<2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2vv_atan2(<2 x double>, <2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2vv_atan2f(<2 x float>, <2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2vv_hypot(<2 x double>, <2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2vv_hypotf(<2 x float>, <2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x double> @_ZGVnN2vv_pow(<2 x double>, <2 x double>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <2 x float> @_ZGVnN2vv_powf(<2 x float>, <2 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_acosf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_acoshf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_asinf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_asinhf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_atanf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_atanhf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_cbrtf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_cosf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_coshf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_erfcf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_erff(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_exp10f(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_exp2f(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_expf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_expm1f(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_log10f(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_log1pf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_log2f(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_logf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_sinf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_sinhf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_tanf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4v_tanhf(<4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4vv_atan2f(<4 x float>, <4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4vv_hypotf(<4 x float>, <4 x float>) [[ATTRS]]
; AARCH64: declare aarch64_vector_pcs <4 x float> @_ZGVnN4vv_powf(<4 x float>, <4 x float>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_acos(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_acosf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_acosh(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_acoshf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_asin(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_asinf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_asinh(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_asinhf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_atan(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_atanf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_atanh(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_atanhf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_cbrt(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_cbrtf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_cos(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_cosf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_cosh(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_coshf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_erf(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_erfc(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_erfcf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_erff(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_exp(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_exp10(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_exp10f(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_exp2(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_exp2f(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_expf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_expm1(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_expm1f(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_log(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_log10(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_log10f(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_log1p(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_log1pf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_log2(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_log2f(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_logf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_sin(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_sinf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_sinh(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_sinhf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_tan(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_tanf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxv_tanh(<vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxv_tanhf(<vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxvv_atan2(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxvv_atan2f(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxvv_hypot(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxvv_hypotf(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 2 x double> @_ZGVsMxvv_pow(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>) [[ATTRS]]
; AARCH64: declare <vscale x 4 x float> @_ZGVsMxvv_powf(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>) [[ATTRS]]
; AARCH64: attributes [[ATTRS]] = { nocallback nofree nosync nounwind willreturn }