blob: 0452bac3c8959c423841cd03f385296af5d4a692 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes='simplifycfg<sink-common-insts>,instnamer' -S %s | FileCheck %s
; This test ensures that given dx.resource.getpointer is marked convergent, the
; SimplifyCFG pass is prevented from sinking the resource accesses out of their
; branches, which would otherwise create an (illegal) phi node selecting between
; two resource pointers.
;
; Without the convergent marking, SimplifyCFG's common-code sinking would sink
; the load/store from both branches into the common successor and introduce:
; %ptr = phi ptr [ %bufA.ptr, %if.then ], [ %bufB.ptr, %if.else ]
; which is an illegal phi node on a resource pointer.
;
; The CHECK lines below match the input IR exactly, so this test verifies that
; the pass makes no changes to the IR.
;
; NOTE: The following IR corresponds to the (post-inlining) lowering of:
;
; RWStructuredBuffer<float> bufA : register(u0);
; RWStructuredBuffer<float> bufB : register(u1);
; RWStructuredBuffer<float> output : register(u2);
;
; cbuffer Constants : register(b0) {
; uint condition;
; };
;
; [numthreads(64, 1, 1)]
; void main(uint tid : SV_DispatchThreadID) {
; if (condition == 0) {
; output[tid] = bufA[tid];
; } else {
; output[tid] = bufB[tid];
; }
; }
@condition = external hidden addrspace(2) global i32, align 4
@.str = private unnamed_addr constant [5 x i8] c"bufA\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"bufB\00", align 1
@.str.4 = private unnamed_addr constant [7 x i8] c"output\00", align 1
define void @main() local_unnamed_addr {
; CHECK-LABEL: define void @main() local_unnamed_addr {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BUFA:%.*]] = tail call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str)
; CHECK-NEXT: [[BUFB:%.*]] = tail call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.2)
; CHECK-NEXT: [[OUTPUT:%.*]] = tail call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 2, i32 1, i32 0, ptr nonnull @.str.4)
; CHECK-NEXT: [[TID:%.*]] = tail call i32 @llvm.dx.thread.id(i32 0)
; CHECK-NEXT: [[COND:%.*]] = load i32, ptr addrspace(2) @condition, align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[COND]], 0
; CHECK-NEXT: br i1 [[CMP]], label %[[IF_THEN:.*]], label %[[IF_ELSE:.*]]
; CHECK: [[IF_THEN]]:
; CHECK-NEXT: [[PA:%.*]] = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t.i32(target("dx.RawBuffer", float, 1, 0) [[BUFA]], i32 [[TID]])
; CHECK-NEXT: [[VA:%.*]] = load float, ptr [[PA]], align 4
; CHECK-NEXT: [[PO1:%.*]] = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t.i32(target("dx.RawBuffer", float, 1, 0) [[OUTPUT]], i32 [[TID]])
; CHECK-NEXT: store float [[VA]], ptr [[PO1]], align 4
; CHECK-NEXT: br label %[[IF_END:.*]]
; CHECK: [[IF_ELSE]]:
; CHECK-NEXT: [[PB:%.*]] = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t.i32(target("dx.RawBuffer", float, 1, 0) [[BUFB]], i32 [[TID]])
; CHECK-NEXT: [[VB:%.*]] = load float, ptr [[PB]], align 4
; CHECK-NEXT: [[PO2:%.*]] = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t.i32(target("dx.RawBuffer", float, 1, 0) [[OUTPUT]], i32 [[TID]])
; CHECK-NEXT: store float [[VB]], ptr [[PO2]], align 4
; CHECK-NEXT: br label %[[IF_END]]
; CHECK: [[IF_END]]:
; CHECK-NEXT: ret void
;
entry:
%bufA = tail call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str)
%bufB = tail call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.2)
%output = tail call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 2, i32 1, i32 0, ptr nonnull @.str.4)
%tid = tail call i32 @llvm.dx.thread.id(i32 0)
%cond = load i32, ptr addrspace(2) @condition, align 4
%cmp = icmp eq i32 %cond, 0
br i1 %cmp, label %if.then, label %if.else
if.then: ; preds = %entry
%pA = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t.i32(target("dx.RawBuffer", float, 1, 0) %bufA, i32 %tid)
%vA = load float, ptr %pA, align 4
%pO1 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t.i32(target("dx.RawBuffer", float, 1, 0) %output, i32 %tid)
store float %vA, ptr %pO1, align 4
br label %if.end
if.else: ; preds = %entry
%pB = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t.i32(target("dx.RawBuffer", float, 1, 0) %bufB, i32 %tid)
%vB = load float, ptr %pB, align 4
%pO2 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t.i32(target("dx.RawBuffer", float, 1, 0) %output, i32 %tid)
store float %vB, ptr %pO2, align 4
br label %if.end
if.end: ; preds = %if.else, %if.then
ret void
}