llvm/test/Transforms/SROA/struct-to-vector-stack-alignment.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -data-layout="e-p:64:64-i64:64-n32:64-S128" -passes='sroa<aggregate-to-vector>' -S %s | FileCheck %s --check-prefixes=COMMON,STACK128
; RUN: opt -data-layout="e-p:64:64-i64:64-n32:64-S64" -passes='sroa<aggregate-to-vector>' -S %s | FileCheck %s --check-prefixes=COMMON,STACK64
; RUN: opt -data-layout="e-p:64:64-i64:64-n32:64" -passes='sroa<aggregate-to-vector>' -S %s | FileCheck %s --check-prefixes=COMMON,UNSPECIFIED

; SROA preserves inherited alignment and only raises it to the preferred
; alignment when the natural stack alignment permits.

%ptr5 = type { ptr, ptr, ptr, ptr, ptr }
%ptr2 = type { ptr, ptr }

declare void @llvm.memcpy.p0.p0.i64(ptr, ptr, i64, i1 immarg)

define void @natural_stack_alignment(ptr %src) {
; STACK128-LABEL: define void @natural_stack_alignment(
; STACK128-SAME: ptr [[SRC:%.*]]) {
; STACK128-NEXT:  [[ENTRY:.*:]]
; STACK128-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <5 x ptr>, align 8
; STACK128-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <5 x ptr>, ptr [[SRC]], align 8
; STACK128-NEXT:    store volatile <5 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 8
; STACK128-NEXT:    ret void
;
; STACK64-LABEL: define void @natural_stack_alignment(
; STACK64-SAME: ptr [[SRC:%.*]]) {
; STACK64-NEXT:  [[ENTRY:.*:]]
; STACK64-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <5 x ptr>, align 8
; STACK64-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <5 x ptr>, ptr [[SRC]], align 8
; STACK64-NEXT:    store volatile <5 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 8
; STACK64-NEXT:    ret void
;
; UNSPECIFIED-LABEL: define void @natural_stack_alignment(
; UNSPECIFIED-SAME: ptr [[SRC:%.*]]) {
; UNSPECIFIED-NEXT:  [[ENTRY:.*:]]
; UNSPECIFIED-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <5 x ptr>, align 64
; UNSPECIFIED-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <5 x ptr>, ptr [[SRC]], align 8
; UNSPECIFIED-NEXT:    store volatile <5 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 64
; UNSPECIFIED-NEXT:    ret void
;
entry:
  %slot = alloca %ptr5, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %slot, ptr align 8 %src,
  i64 40, i1 true)
  ret void
}

define void @explicit_above_stack_alignment(ptr %src) {
; STACK128-LABEL: define void @explicit_above_stack_alignment(
; STACK128-SAME: ptr [[SRC:%.*]]) {
; STACK128-NEXT:  [[ENTRY:.*:]]
; STACK128-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <5 x ptr>, align 32
; STACK128-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <5 x ptr>, ptr [[SRC]], align 8
; STACK128-NEXT:    store volatile <5 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 32
; STACK128-NEXT:    ret void
;
; STACK64-LABEL: define void @explicit_above_stack_alignment(
; STACK64-SAME: ptr [[SRC:%.*]]) {
; STACK64-NEXT:  [[ENTRY:.*:]]
; STACK64-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <5 x ptr>, align 32
; STACK64-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <5 x ptr>, ptr [[SRC]], align 8
; STACK64-NEXT:    store volatile <5 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 32
; STACK64-NEXT:    ret void
;
; UNSPECIFIED-LABEL: define void @explicit_above_stack_alignment(
; UNSPECIFIED-SAME: ptr [[SRC:%.*]]) {
; UNSPECIFIED-NEXT:  [[ENTRY:.*:]]
; UNSPECIFIED-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <5 x ptr>, align 64
; UNSPECIFIED-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <5 x ptr>, ptr [[SRC]], align 8
; UNSPECIFIED-NEXT:    store volatile <5 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 64
; UNSPECIFIED-NEXT:    ret void
;
entry:
  %slot = alloca %ptr5, align 32
  call void @llvm.memcpy.p0.p0.i64(ptr align 32 %slot, ptr align 8 %src,
  i64 40, i1 true)
  ret void
}

define void @explicit_preferred_alignment(ptr %src) {
; COMMON-LABEL: define void @explicit_preferred_alignment(
; COMMON-SAME: ptr [[SRC:%.*]]) {
; COMMON-NEXT:  [[ENTRY:.*:]]
; COMMON-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <5 x ptr>, align 64
; COMMON-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <5 x ptr>, ptr [[SRC]], align 8
; COMMON-NEXT:    store volatile <5 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 64
; COMMON-NEXT:    ret void
;
entry:
  %slot = alloca %ptr5, align 64
  call void @llvm.memcpy.p0.p0.i64(ptr align 64 %slot, ptr align 8 %src,
  i64 40, i1 true)
  ret void
}

define void @explicit_above_preferred_alignment(ptr %src) {
; COMMON-LABEL: define void @explicit_above_preferred_alignment(
; COMMON-SAME: ptr [[SRC:%.*]]) {
; COMMON-NEXT:  [[ENTRY:.*:]]
; COMMON-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <5 x ptr>, align 128
; COMMON-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <5 x ptr>, ptr [[SRC]], align 8
; COMMON-NEXT:    store volatile <5 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 128
; COMMON-NEXT:    ret void
;
entry:
  %slot = alloca %ptr5, align 128
  call void @llvm.memcpy.p0.p0.i64(ptr align 128 %slot, ptr align 8 %src,
  i64 40, i1 true)
  ret void
}

define void @promote_within_stack_alignment(ptr %src) {
; STACK128-LABEL: define void @promote_within_stack_alignment(
; STACK128-SAME: ptr [[SRC:%.*]]) {
; STACK128-NEXT:  [[ENTRY:.*:]]
; STACK128-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <2 x ptr>, align 16
; STACK128-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <2 x ptr>, ptr [[SRC]], align 8
; STACK128-NEXT:    store volatile <2 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 16
; STACK128-NEXT:    ret void
;
; STACK64-LABEL: define void @promote_within_stack_alignment(
; STACK64-SAME: ptr [[SRC:%.*]]) {
; STACK64-NEXT:  [[ENTRY:.*:]]
; STACK64-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <2 x ptr>, align 8
; STACK64-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <2 x ptr>, ptr [[SRC]], align 8
; STACK64-NEXT:    store volatile <2 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 8
; STACK64-NEXT:    ret void
;
; UNSPECIFIED-LABEL: define void @promote_within_stack_alignment(
; UNSPECIFIED-SAME: ptr [[SRC:%.*]]) {
; UNSPECIFIED-NEXT:  [[ENTRY:.*:]]
; UNSPECIFIED-NEXT:    [[SLOT_SROA_0:%.*]] = alloca <2 x ptr>, align 16
; UNSPECIFIED-NEXT:    [[SLOT_SROA_0_0_COPYLOAD:%.*]] = load volatile <2 x ptr>, ptr [[SRC]], align 8
; UNSPECIFIED-NEXT:    store volatile <2 x ptr> [[SLOT_SROA_0_0_COPYLOAD]], ptr [[SLOT_SROA_0]], align 16
; UNSPECIFIED-NEXT:    ret void
;
entry:
  %slot = alloca %ptr2, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %slot, ptr align 8 %src,
  i64 16, i1 true)
  ret void
}