| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 |
| ; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s |
| |
| define i1 @test(double %circ_radius, ptr %x, double %0) { |
| ; CHECK-LABEL: define i1 @test( |
| ; CHECK-SAME: double [[CIRC_RADIUS:%.*]], ptr [[X:%.*]], double [[TMP0:%.*]]) { |
| ; CHECK-NEXT: [[ENTRY:.*:]] |
| ; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[X]], align 8 |
| ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x double> poison, double [[TMP0]], i32 1 |
| ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x double> [[TMP2]], double [[TMP1]], i32 0 |
| ; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP3]], <4 x double> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1> |
| ; CHECK-NEXT: [[TMP5:%.*]] = fadd <4 x double> [[TMP4]], <double -0.000000e+00, double -0.000000e+00, double 0.000000e+00, double -0.000000e+00> |
| ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x double> [[TMP3]], <4 x double> <double 0.000000e+00, double poison, double 0.000000e+00, double 0.000000e+00>, <4 x i32> <i32 4, i32 0, i32 6, i32 7> |
| ; CHECK-NEXT: [[TMP7:%.*]] = fmul <4 x double> [[TMP5]], [[TMP6]] |
| ; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x double> [[TMP7]], <4 x double> poison, <4 x i32> <i32 1, i32 2, i32 poison, i32 0> |
| ; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x double> poison, double [[CIRC_RADIUS]], i32 0 |
| ; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x double> [[TMP9]], <4 x double> poison, <4 x i32> <i32 poison, i32 poison, i32 0, i32 poison> |
| ; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <4 x double> [[TMP8]], <4 x double> [[TMP10]], <4 x i32> <i32 0, i32 1, i32 6, i32 3> |
| ; CHECK-NEXT: [[TMP12:%.*]] = fadd <4 x double> [[TMP7]], [[TMP11]] |
| ; CHECK-NEXT: [[TMP13:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> [[TMP12]]) |
| ; CHECK-NEXT: [[TMP14:%.*]] = fcmp olt <4 x double> [[TMP13]], splat (double 1.000000e+00) |
| ; CHECK-NEXT: [[TMP15:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP14]]) |
| ; CHECK-NEXT: ret i1 [[TMP15]] |
| ; |
| entry: |
| %1 = load double, ptr %x, align 8 |
| %square = fmul double %1, 0.000000e+00 |
| %square105 = fmul double %1, %1 |
| %add = fadd double %square, %square105 |
| %sqrt116 = call double @llvm.sqrt.f64(double %add) |
| %add20 = fadd double %1, 0.000000e+00 |
| %square106 = fmul double %add20, 0.000000e+00 |
| %add25 = fadd double %square105, %square106 |
| %sqrt115 = call double @llvm.sqrt.f64(double %add25) |
| %square109 = fmul double %0, 0.000000e+00 |
| %add39 = fadd double %square106, %circ_radius |
| %sqrt114 = call double @llvm.sqrt.f64(double %add39) |
| %add50 = fadd double %square, %square109 |
| %sqrt = call double @llvm.sqrt.f64(double %add50) |
| %cmp52 = fcmp olt double %sqrt116, 1.000000e+00 |
| %cmp54 = fcmp olt double %sqrt115, 1.000000e+00 |
| %or.cond = or i1 %cmp52, %cmp54 |
| %cmp57 = fcmp olt double %sqrt114, 1.000000e+00 |
| %or.cond112 = or i1 %or.cond, %cmp57 |
| %cmp60 = fcmp olt double %sqrt, 1.000000e+00 |
| %or.cond113 = or i1 %or.cond112, %cmp60 |
| ret i1 %or.cond113 |
| } |
| |
| declare double @llvm.sqrt.f64(double) #0 |
| |
