llvm/test/Transforms/SLPVectorizer/X86/copyables-with-parent-scalars-in-phis.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-99999 < %s | FileCheck %s

define i32 @test() {
; CHECK-LABEL: define i32 @test() {
; CHECK-NEXT:  [[BB:.*]]:
; CHECK-NEXT:    br label %[[BB3:.*]]
; CHECK:       [[BB1:.*]]:
; CHECK-NEXT:    [[TMP0:%.*]] = phi <2 x i32> [ [[TMP6:%.*]], %[[BB3]] ]
; CHECK-NEXT:    ret i32 0
; CHECK:       [[BB3]]:
; CHECK-NEXT:    [[TMP1:%.*]] = phi <2 x i32> [ zeroinitializer, %[[BB]] ], [ [[TMP9:%.*]], %[[BB3]] ]
; CHECK-NEXT:    [[LOAD:%.*]] = load i64, ptr null, align 8
; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i64 [[LOAD]] to i32
; CHECK-NEXT:    [[TMP10:%.*]] = insertelement <2 x i32> <i32 0, i32 poison>, i32 [[TRUNC]], i32 1
; CHECK-NEXT:    [[TMP3:%.*]] = and <2 x i32> [[TMP10]], <i32 0, i32 -1>
; CHECK-NEXT:    [[AND:%.*]] = extractelement <2 x i32> [[TMP3]], i32 0
; CHECK-NEXT:    [[ASHR:%.*]] = ashr i32 0, [[AND]]
; CHECK-NEXT:    [[TMP4:%.*]] = ashr <2 x i32> [[TMP1]], [[TMP3]]
; CHECK-NEXT:    [[TMP5:%.*]] = or <2 x i32> [[TMP1]], [[TMP3]]
; CHECK-NEXT:    [[TMP6]] = shufflevector <2 x i32> [[TMP4]], <2 x i32> [[TMP5]], <2 x i32> <i32 0, i32 3>
; CHECK-NEXT:    [[TMP7:%.*]] = shufflevector <2 x i32> [[TMP6]], <2 x i32> [[TMP1]], <2 x i32> <i32 0, i32 3>
; CHECK-NEXT:    [[TMP8:%.*]] = shufflevector <2 x i32> [[TMP3]], <2 x i32> <i32 0, i32 poison>, <2 x i32> <i32 2, i32 1>
; CHECK-NEXT:    [[TMP9]] = or <2 x i32> [[TMP7]], [[TMP8]]
; CHECK-NEXT:    br i1 false, label %[[BB1]], label %[[BB3]]
;
bb:
  br label %bb3

bb1:
  %phi = phi i32 [ %or, %bb3 ]
  %phi2 = phi i32 [ %ashr7, %bb3 ]
  ret i32 0

bb3:
  %phi4 = phi i32 [ 0, %bb ], [ %or, %bb3 ]
  %phi5 = phi i32 [ 0, %bb ], [ %or8, %bb3 ]
  %load = load i64, ptr null, align 8
  %trunc = trunc i64 %load to i32
  %or = or i32 %phi4, %trunc
  %trunc6 = trunc i64 0 to i32
  %and = and i32 %trunc6, 0
  %ashr = ashr i32 0, %and
  %ashr7 = ashr i32 %phi5, %and
  %or8 = or i32 %ashr7, 0
  br i1 false, label %bb1, label %bb3
}