| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 |
| ; RUN: opt < %s -passes="default<O3>" -mcpu=skx -S | FileCheck %s |
| |
| target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" |
| target triple = "x86_64-unknown-linux-gnu" |
| |
| define void @foo(ptr noalias noundef %0, ptr noalias noundef %1) optsize { |
| ; CHECK-LABEL: define void @foo( |
| ; CHECK-SAME: ptr noalias noundef readonly captures(none) [[TMP0:%.*]], ptr noalias noundef writeonly captures(none) [[TMP1:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { |
| ; CHECK-NEXT: vector.ph: |
| ; CHECK-NEXT: br label [[TMP4:%.*]] |
| ; CHECK: vector.body: |
| ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[TMP2:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[TMP4]] ] |
| ; CHECK-NEXT: [[TMP3:%.*]] = sub nuw nsw i64 255, [[INDVARS_IV]] |
| ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[TMP0]], i64 [[TMP3]] |
| ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr [[TMP7]], i64 -28 |
| ; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = load <8 x i32>, ptr [[GEP]], align 4 |
| ; CHECK-NEXT: [[TMP5:%.*]] = add nsw <8 x i32> [[WIDE_MASKED_GATHER]], splat (i32 5) |
| ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <8 x i32> [[TMP5]], <8 x i32> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> |
| ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[TMP1]], i64 [[INDVARS_IV]] |
| ; CHECK-NEXT: store <8 x i32> [[TMP6]], ptr [[TMP10]], align 4 |
| ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw i64 [[INDVARS_IV]], 8 |
| ; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 256 |
| ; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[MIDDLE_BLOCK:%.*]], label [[TMP4]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; CHECK: middle.block: |
| ; CHECK-NEXT: ret void |
| ; |
| br label %3 |
| |
| 3: ; preds = %7, %2 |
| %4 = phi i32 [ 0, %2 ], [ %15, %7 ] |
| %5 = icmp slt i32 %4, 256 |
| br i1 %5, label %7, label %6 |
| |
| 6: ; preds = %3 |
| ret void |
| |
| 7: ; preds = %3 |
| %8 = sub nsw i32 255, %4 |
| %9 = zext nneg i32 %8 to i64 |
| %10 = getelementptr inbounds i32, ptr %0, i64 %9 |
| %11 = load i32, ptr %10, align 4 |
| %12 = add nsw i32 %11, 5 |
| %13 = sext i32 %4 to i64 |
| %14 = getelementptr inbounds i32, ptr %1, i64 %13 |
| store i32 %12, ptr %14, align 4 |
| %15 = add nsw i32 %4, 1 |
| br label %3 |
| } |
| ;. |
| ; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} |
| ; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| ; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} |
| ;. |
