llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-add.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes="default<O2>" -S -mtriple=i686--   -mcpu=x86-64    | FileCheck %s
; RUN: opt < %s -passes="default<O2>" -S -mtriple=i686--   -mcpu=x86-64-v2 | FileCheck %s
; RUN: opt < %s -passes="default<O2>" -S -mtriple=i686--   -mcpu=x86-64-v3 | FileCheck %s
; RUN: opt < %s -passes="default<O2>" -S -mtriple=i686--   -mcpu=x86-64-v4 | FileCheck %s
; RUN: opt < %s -passes="default<O2>" -S -mtriple=x86_64-- -mcpu=x86-64    | FileCheck %s
; RUN: opt < %s -passes="default<O2>" -S -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s
; RUN: opt < %s -passes="default<O2>" -S -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s
; RUN: opt < %s -passes="default<O2>" -S -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s

; PR37890 - subvector reduction followed by shuffle reduction

define i32 @PR37890_v4i32(<4 x i32> %a)  {
; CHECK-LABEL: define i32 @PR37890_v4i32(
; CHECK-SAME: <4 x i32> [[A:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:    [[E:%.*]] = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[A]])
; CHECK-NEXT:    ret i32 [[E]]
;
  %hi0 = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
  %lo0 = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
  %sum0 = add <2 x i32> %lo0, %hi0
  %hi1 = shufflevector <2 x i32> %sum0, <2 x i32> undef, <2 x i32> <i32 1, i32 undef>
  %sum1 = add <2 x i32> %sum0, %hi1
  %e = extractelement <2 x i32> %sum1, i32 0
  ret i32 %e
}

define i16 @PR37890_v8i16(<8 x i16> %a)  {
; CHECK-LABEL: define i16 @PR37890_v8i16(
; CHECK-SAME: <8 x i16> [[A:%.*]]) local_unnamed_addr #[[ATTR0]] {
; CHECK-NEXT:    [[E:%.*]] = tail call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> [[A]])
; CHECK-NEXT:    ret i16 [[E]]
;
  %hi0 = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
  %lo0 = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
  %sum0 = add <4 x i16> %lo0, %hi0
  %hi1 = shufflevector <4 x i16> %sum0, <4 x i16> undef, <2 x i32> <i32 2, i32 3>
  %lo1 = shufflevector <4 x i16> %sum0, <4 x i16> undef, <2 x i32> <i32 0, i32 1>
  %sum1 = add <2 x i16> %lo1, %hi1
  %hi2 = shufflevector <2 x i16> %sum1, <2 x i16> undef, <2 x i32> <i32 1, i32 undef>
  %sum2 = add <2 x i16> %sum1, %hi2
  %e = extractelement <2 x i16> %sum2, i32 0
  ret i16 %e
}

define i32 @PR37890_v8i32(<8 x i32> %a)  {
; CHECK-LABEL: define i32 @PR37890_v8i32(
; CHECK-SAME: <8 x i32> [[A:%.*]]) local_unnamed_addr #[[ATTR0]] {
; CHECK-NEXT:    [[E:%.*]] = tail call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> [[A]])
; CHECK-NEXT:    ret i32 [[E]]
;
  %hi0 = shufflevector <8 x i32> %a, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
  %lo0 = shufflevector <8 x i32> %a, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
  %sum0 = add <4 x i32> %lo0, %hi0
  %hi1 = shufflevector <4 x i32> %sum0, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
  %lo1 = shufflevector <4 x i32> %sum0, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
  %sum1 = add <2 x i32> %lo1, %hi1
  %hi2 = shufflevector <2 x i32> %sum1, <2 x i32> undef, <2 x i32> <i32 1, i32 undef>
  %sum2 = add <2 x i32> %sum1, %hi2
  %e = extractelement <2 x i32> %sum2, i32 0
  ret i32 %e
}

define i16 @PR37890_v16i16(<16 x i16> %a)  {
; CHECK-LABEL: define i16 @PR37890_v16i16(
; CHECK-SAME: <16 x i16> [[A:%.*]]) local_unnamed_addr #[[ATTR0]] {
; CHECK-NEXT:    [[E:%.*]] = tail call i16 @llvm.vector.reduce.add.v16i16(<16 x i16> [[A]])
; CHECK-NEXT:    ret i16 [[E]]
;
  %hi0 = shufflevector <16 x i16> %a, <16 x i16> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
  %lo0 = shufflevector <16 x i16> %a, <16 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  %sum0 = add <8 x i16> %lo0, %hi0
  %hi1 = shufflevector <8 x i16> %sum0, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
  %lo1 = shufflevector <8 x i16> %sum0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
  %sum1 = add <4 x i16> %lo1, %hi1
  %hi2 = shufflevector <4 x i16> %sum1, <4 x i16> undef, <2 x i32> <i32 2, i32 3>
  %lo2 = shufflevector <4 x i16> %sum1, <4 x i16> undef, <2 x i32> <i32 0, i32 1>
  %sum2 = add <2 x i16> %lo2, %hi2
  %hi3 = shufflevector <2 x i16> %sum2, <2 x i16> undef, <2 x i32> <i32 1, i32 undef>
  %sum3 = add <2 x i16> %sum2, %hi3
  %e = extractelement <2 x i16> %sum3, i32 0
  ret i16 %e
}

define i32 @PR37890_v16i32(<16 x i32> %a)  {
; CHECK-LABEL: define i32 @PR37890_v16i32(
; CHECK-SAME: <16 x i32> [[A:%.*]]) local_unnamed_addr #[[ATTR0]] {
; CHECK-NEXT:    [[E:%.*]] = tail call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[A]])
; CHECK-NEXT:    ret i32 [[E]]
;
  %hi0 = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
  %lo0 = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  %sum0 = add <8 x i32> %lo0, %hi0
  %hi1 = shufflevector <8 x i32> %sum0, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
  %lo1 = shufflevector <8 x i32> %sum0, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
  %sum1 = add <4 x i32> %lo1, %hi1
  %hi2 = shufflevector <4 x i32> %sum1, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
  %lo2 = shufflevector <4 x i32> %sum1, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
  %sum2 = add <2 x i32> %lo2, %hi2
  %hi3 = shufflevector <2 x i32> %sum2, <2 x i32> undef, <2 x i32> <i32 1, i32 undef>
  %sum3 = add <2 x i32> %sum2, %hi3
  %e = extractelement <2 x i32> %sum3, i32 0
  ret i32 %e
}

; PR33758: https://bugs.llvm.org/show_bug.cgi?id=33758

define i32 @partial_reduction_add_v8i32(<8 x i32> %x) {
; CHECK-LABEL: define i32 @partial_reduction_add_v8i32(
; CHECK-SAME: <8 x i32> [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <8 x i32> [[X]], <8 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP1]])
; CHECK-NEXT:    ret i32 [[R]]
;
  %x23 = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
  %x0213 = add <8 x i32> %x, %x23
  %x13 = shufflevector <8 x i32> %x0213, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
  %x0123 = add <8 x i32> %x0213, %x13
  %r = extractelement <8 x i32> %x0123, i32 0
  ret i32 %r
}

define i32 @partial_reduction_add_v16i32(<16 x i32> %x) {
; CHECK-LABEL: define i32 @partial_reduction_add_v16i32(
; CHECK-SAME: <16 x i32> [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <16 x i32> [[X]], <16 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP1]])
; CHECK-NEXT:    ret i32 [[R]]
;
  %x23 = shufflevector <16 x i32> %x, <16 x i32> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
  %x0213 = add <16 x i32> %x, %x23
  %x13 = shufflevector <16 x i32> %x0213, <16 x i32> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
  %x0123 = add <16 x i32> %x0213, %x13
  %r = extractelement <16 x i32> %x0123, i32 0
  ret i32 %r
}