blob: b619eaf1e90fe42d19a21ab288a754d6708de034 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "br i1|!prof|!llvm.loop|^.*:" --version 6
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s --check-prefix=VF4IC1
; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=2 -S %s | FileCheck %s --check-prefix=VF2IC2
; Predicated store where the condition is taken 1 in 8 iterations.
define void @predicated_store(ptr %a, i32 %n) {
; VF4IC1-LABEL: define void @predicated_store(
; VF4IC1-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; VF4IC1: [[ENTRY:.*:]]
; VF4IC1: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]], !prof [[PROF0:![0-9]+]]
; VF4IC1: [[VECTOR_PH]]:
; VF4IC1: [[VECTOR_BODY:.*]]:
; VF4IC1: br i1 [[TMP2:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF4IC1: [[PRED_STORE_IF]]:
; VF4IC1: [[PRED_STORE_CONTINUE]]:
; VF4IC1: br i1 [[TMP5:%.*]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]
; VF4IC1: [[PRED_STORE_IF1]]:
; VF4IC1: [[PRED_STORE_CONTINUE2]]:
; VF4IC1: br i1 [[TMP10:%.*]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]
; VF4IC1: [[PRED_STORE_IF3]]:
; VF4IC1: [[PRED_STORE_CONTINUE4]]:
; VF4IC1: br i1 [[TMP15:%.*]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]]
; VF4IC1: [[PRED_STORE_IF5]]:
; VF4IC1: [[PRED_STORE_CONTINUE6]]:
; VF4IC1: br i1 [[TMP20:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !prof [[PROF1:![0-9]+]], !llvm.loop [[LOOP2:![0-9]+]]
; VF4IC1: [[MIDDLE_BLOCK]]:
; VF4IC1: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]], !prof [[PROF6:![0-9]+]]
; VF4IC1: [[SCALAR_PH]]:
; VF4IC1: [[LOOP:.*]]:
; VF4IC1: br i1 [[CMP:%.*]], label %[[IF_THEN:.*]], label %[[LATCH:.*]], !prof [[PROF7:![0-9]+]]
; VF4IC1: [[IF_THEN]]:
; VF4IC1: [[LATCH]]:
; VF4IC1: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !prof [[PROF8:![0-9]+]], !llvm.loop [[LOOP9:![0-9]+]]
; VF4IC1: [[EXIT]]:
;
; VF2IC2-LABEL: define void @predicated_store(
; VF2IC2-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; VF2IC2: [[ENTRY:.*:]]
; VF2IC2: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]], !prof [[PROF0:![0-9]+]]
; VF2IC2: [[VECTOR_PH]]:
; VF2IC2: [[VECTOR_BODY:.*]]:
; VF2IC2: br i1 [[TMP4:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF2IC2: [[PRED_STORE_IF]]:
; VF2IC2: [[PRED_STORE_CONTINUE]]:
; VF2IC2: br i1 [[TMP7:%.*]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3:.*]]
; VF2IC2: [[PRED_STORE_IF2]]:
; VF2IC2: [[PRED_STORE_CONTINUE3]]:
; VF2IC2: br i1 [[TMP12:%.*]], label %[[PRED_STORE_IF4:.*]], label %[[PRED_STORE_CONTINUE5:.*]]
; VF2IC2: [[PRED_STORE_IF4]]:
; VF2IC2: [[PRED_STORE_CONTINUE5]]:
; VF2IC2: br i1 [[TMP17:%.*]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7:.*]]
; VF2IC2: [[PRED_STORE_IF6]]:
; VF2IC2: [[PRED_STORE_CONTINUE7]]:
; VF2IC2: br i1 [[TMP22:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !prof [[PROF1:![0-9]+]], !llvm.loop [[LOOP2:![0-9]+]]
; VF2IC2: [[MIDDLE_BLOCK]]:
; VF2IC2: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]], !prof [[PROF6:![0-9]+]]
; VF2IC2: [[SCALAR_PH]]:
; VF2IC2: [[LOOP:.*]]:
; VF2IC2: br i1 [[CMP:%.*]], label %[[IF_THEN:.*]], label %[[LATCH:.*]], !prof [[PROF7:![0-9]+]]
; VF2IC2: [[IF_THEN]]:
; VF2IC2: [[LATCH]]:
; VF2IC2: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !prof [[PROF8:![0-9]+]], !llvm.loop [[LOOP9:![0-9]+]]
; VF2IC2: [[EXIT]]:
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %latch ]
%gep = getelementptr inbounds i32, ptr %a, i32 %iv
%val = load i32, ptr %gep, align 4
%cmp = icmp sgt i32 %val, 0
br i1 %cmp, label %if.then, label %latch, !prof !1
if.then:
%add = add i32 %val, 1
store i32 %add, ptr %gep, align 4
br label %latch
latch:
%iv.next = add nuw nsw i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %exit, label %loop, !prof !0
exit:
ret void
}
; Predicated store guarded by %c1 (taken 1/2) and %c2 (taken 1/4), so it
; executes 1 in 8 iterations.
define void @predicated_store_sunk_address(ptr %a, ptr %b, i32 %n) {
; VF4IC1-LABEL: define void @predicated_store_sunk_address(
; VF4IC1-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i32 [[N:%.*]]) {
; VF4IC1: [[ENTRY:.*:]]
; VF4IC1: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]], !prof [[PROF0]]
; VF4IC1: [[VECTOR_MEMCHECK]]:
; VF4IC1: br i1 [[DIFF_CHECK:%.*]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]], !prof [[PROF0]]
; VF4IC1: [[VECTOR_PH]]:
; VF4IC1: [[VECTOR_BODY:.*]]:
; VF4IC1: br i1 [[TMP6:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF4IC1: [[PRED_STORE_IF]]:
; VF4IC1: [[PRED_STORE_CONTINUE]]:
; VF4IC1: br i1 [[TMP9:%.*]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]
; VF4IC1: [[PRED_STORE_IF3]]:
; VF4IC1: [[PRED_STORE_CONTINUE4]]:
; VF4IC1: br i1 [[TMP13:%.*]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]]
; VF4IC1: [[PRED_STORE_IF5]]:
; VF4IC1: [[PRED_STORE_CONTINUE6]]:
; VF4IC1: br i1 [[TMP17:%.*]], label %[[PRED_STORE_IF7:.*]], label %[[PRED_STORE_CONTINUE8:.*]]
; VF4IC1: [[PRED_STORE_IF7]]:
; VF4IC1: [[PRED_STORE_CONTINUE8]]:
; VF4IC1: br i1 [[TMP21:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !prof [[PROF1]], !llvm.loop [[LOOP11:![0-9]+]]
; VF4IC1: [[MIDDLE_BLOCK]]:
; VF4IC1: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]], !prof [[PROF6]]
; VF4IC1: [[SCALAR_PH]]:
; VF4IC1: [[LOOP:.*]]:
; VF4IC1: br i1 [[C1:%.*]], label %[[M:.*]], label %[[LATCH:.*]], !prof [[PROF12:![0-9]+]]
; VF4IC1: [[M]]:
; VF4IC1: br i1 [[C2:%.*]], label %[[IF:.*]], label %[[LATCH]], !prof [[PROF6]]
; VF4IC1: [[IF]]:
; VF4IC1: [[LATCH]]:
; VF4IC1: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !prof [[PROF8]], !llvm.loop [[LOOP13:![0-9]+]]
; VF4IC1: [[EXIT]]:
;
; VF2IC2-LABEL: define void @predicated_store_sunk_address(
; VF2IC2-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i32 [[N:%.*]]) {
; VF2IC2: [[ENTRY:.*:]]
; VF2IC2: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]], !prof [[PROF0]]
; VF2IC2: [[VECTOR_MEMCHECK]]:
; VF2IC2: br i1 [[DIFF_CHECK:%.*]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]], !prof [[PROF0]]
; VF2IC2: [[VECTOR_PH]]:
; VF2IC2: [[VECTOR_BODY:.*]]:
; VF2IC2: br i1 [[TMP10:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF2IC2: [[PRED_STORE_IF]]:
; VF2IC2: [[PRED_STORE_CONTINUE]]:
; VF2IC2: br i1 [[TMP13:%.*]], label %[[PRED_STORE_IF4:.*]], label %[[PRED_STORE_CONTINUE5:.*]]
; VF2IC2: [[PRED_STORE_IF4]]:
; VF2IC2: [[PRED_STORE_CONTINUE5]]:
; VF2IC2: br i1 [[TMP17:%.*]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7:.*]]
; VF2IC2: [[PRED_STORE_IF6]]:
; VF2IC2: [[PRED_STORE_CONTINUE7]]:
; VF2IC2: br i1 [[TMP21:%.*]], label %[[PRED_STORE_IF8:.*]], label %[[PRED_STORE_CONTINUE9:.*]]
; VF2IC2: [[PRED_STORE_IF8]]:
; VF2IC2: [[PRED_STORE_CONTINUE9]]:
; VF2IC2: br i1 [[TMP25:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !prof [[PROF1]], !llvm.loop [[LOOP11:![0-9]+]]
; VF2IC2: [[MIDDLE_BLOCK]]:
; VF2IC2: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]], !prof [[PROF6]]
; VF2IC2: [[SCALAR_PH]]:
; VF2IC2: [[LOOP:.*]]:
; VF2IC2: br i1 [[C1:%.*]], label %[[M:.*]], label %[[LATCH:.*]], !prof [[PROF12:![0-9]+]]
; VF2IC2: [[M]]:
; VF2IC2: br i1 [[C2:%.*]], label %[[IF:.*]], label %[[LATCH]], !prof [[PROF6]]
; VF2IC2: [[IF]]:
; VF2IC2: [[LATCH]]:
; VF2IC2: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !prof [[PROF8]], !llvm.loop [[LOOP13:![0-9]+]]
; VF2IC2: [[EXIT]]:
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %latch ]
%gep.a = getelementptr inbounds i32, ptr %a, i32 %iv
%v = load i32, ptr %gep.a, align 4
%c1 = icmp sgt i32 %v, 0
br i1 %c1, label %m, label %latch, !prof !2
m:
%gep.b = getelementptr inbounds i32, ptr %b, i32 %iv
%c2 = icmp sgt i32 %v, 100
br i1 %c2, label %if, label %latch, !prof !3
if:
store i32 %v, ptr %gep.b, align 4
br label %latch
latch:
%iv.next = add nuw nsw i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %exit, label %loop, !prof !0
exit:
ret void
}
; Loop without profile data.
define void @predicated_store_no_profile(ptr %a, i32 %n) {
; VF4IC1-LABEL: define void @predicated_store_no_profile(
; VF4IC1-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; VF4IC1: [[ENTRY:.*:]]
; VF4IC1: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; VF4IC1: [[VECTOR_PH]]:
; VF4IC1: [[VECTOR_BODY:.*]]:
; VF4IC1: br i1 [[TMP2:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF4IC1: [[PRED_STORE_IF]]:
; VF4IC1: [[PRED_STORE_CONTINUE]]:
; VF4IC1: br i1 [[TMP5:%.*]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]
; VF4IC1: [[PRED_STORE_IF1]]:
; VF4IC1: [[PRED_STORE_CONTINUE2]]:
; VF4IC1: br i1 [[TMP10:%.*]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]
; VF4IC1: [[PRED_STORE_IF3]]:
; VF4IC1: [[PRED_STORE_CONTINUE4]]:
; VF4IC1: br i1 [[TMP15:%.*]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]]
; VF4IC1: [[PRED_STORE_IF5]]:
; VF4IC1: [[PRED_STORE_CONTINUE6]]:
; VF4IC1: br i1 [[TMP20:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
; VF4IC1: [[MIDDLE_BLOCK]]:
; VF4IC1: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; VF4IC1: [[SCALAR_PH]]:
; VF4IC1: [[LOOP:.*]]:
; VF4IC1: br i1 [[CMP:%.*]], label %[[IF_THEN:.*]], label %[[LATCH:.*]]
; VF4IC1: [[IF_THEN]]:
; VF4IC1: [[LATCH]]:
; VF4IC1: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP15:![0-9]+]]
; VF4IC1: [[EXIT]]:
;
; VF2IC2-LABEL: define void @predicated_store_no_profile(
; VF2IC2-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; VF2IC2: [[ENTRY:.*:]]
; VF2IC2: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; VF2IC2: [[VECTOR_PH]]:
; VF2IC2: [[VECTOR_BODY:.*]]:
; VF2IC2: br i1 [[TMP4:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF2IC2: [[PRED_STORE_IF]]:
; VF2IC2: [[PRED_STORE_CONTINUE]]:
; VF2IC2: br i1 [[TMP7:%.*]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3:.*]]
; VF2IC2: [[PRED_STORE_IF2]]:
; VF2IC2: [[PRED_STORE_CONTINUE3]]:
; VF2IC2: br i1 [[TMP12:%.*]], label %[[PRED_STORE_IF4:.*]], label %[[PRED_STORE_CONTINUE5:.*]]
; VF2IC2: [[PRED_STORE_IF4]]:
; VF2IC2: [[PRED_STORE_CONTINUE5]]:
; VF2IC2: br i1 [[TMP17:%.*]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7:.*]]
; VF2IC2: [[PRED_STORE_IF6]]:
; VF2IC2: [[PRED_STORE_CONTINUE7]]:
; VF2IC2: br i1 [[TMP22:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
; VF2IC2: [[MIDDLE_BLOCK]]:
; VF2IC2: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; VF2IC2: [[SCALAR_PH]]:
; VF2IC2: [[LOOP:.*]]:
; VF2IC2: br i1 [[CMP:%.*]], label %[[IF_THEN:.*]], label %[[LATCH:.*]]
; VF2IC2: [[IF_THEN]]:
; VF2IC2: [[LATCH]]:
; VF2IC2: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP15:![0-9]+]]
; VF2IC2: [[EXIT]]:
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %latch ]
%gep = getelementptr inbounds i32, ptr %a, i32 %iv
%val = load i32, ptr %gep, align 4
%cmp = icmp sgt i32 %val, 0
br i1 %cmp, label %if.then, label %latch
if.then:
%add = add i32 %val, 1
store i32 %add, ptr %gep, align 4
br label %latch
latch:
%iv.next = add nuw nsw i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %exit, label %loop
exit:
ret void
}
; Profile data for the loop latch, but not internal loop blocks.
define void @predicated_store_unprofiled_predicate(ptr %a, i32 %n) {
; VF4IC1-LABEL: define void @predicated_store_unprofiled_predicate(
; VF4IC1-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; VF4IC1: [[ENTRY:.*:]]
; VF4IC1: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]], !prof [[PROF0]]
; VF4IC1: [[VECTOR_PH]]:
; VF4IC1: [[VECTOR_BODY:.*]]:
; VF4IC1: br i1 [[TMP2:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF4IC1: [[PRED_STORE_IF]]:
; VF4IC1: [[PRED_STORE_CONTINUE]]:
; VF4IC1: br i1 [[TMP5:%.*]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]
; VF4IC1: [[PRED_STORE_IF1]]:
; VF4IC1: [[PRED_STORE_CONTINUE2]]:
; VF4IC1: br i1 [[TMP10:%.*]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]
; VF4IC1: [[PRED_STORE_IF3]]:
; VF4IC1: [[PRED_STORE_CONTINUE4]]:
; VF4IC1: br i1 [[TMP15:%.*]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]]
; VF4IC1: [[PRED_STORE_IF5]]:
; VF4IC1: [[PRED_STORE_CONTINUE6]]:
; VF4IC1: br i1 [[TMP20:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !prof [[PROF1]], !llvm.loop [[LOOP16:![0-9]+]]
; VF4IC1: [[MIDDLE_BLOCK]]:
; VF4IC1: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]], !prof [[PROF6]]
; VF4IC1: [[SCALAR_PH]]:
; VF4IC1: [[LOOP:.*]]:
; VF4IC1: br i1 [[CMP:%.*]], label %[[IF_THEN:.*]], label %[[LATCH:.*]]
; VF4IC1: [[IF_THEN]]:
; VF4IC1: [[LATCH]]:
; VF4IC1: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !prof [[PROF8]], !llvm.loop [[LOOP17:![0-9]+]]
; VF4IC1: [[EXIT]]:
;
; VF2IC2-LABEL: define void @predicated_store_unprofiled_predicate(
; VF2IC2-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; VF2IC2: [[ENTRY:.*:]]
; VF2IC2: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]], !prof [[PROF0]]
; VF2IC2: [[VECTOR_PH]]:
; VF2IC2: [[VECTOR_BODY:.*]]:
; VF2IC2: br i1 [[TMP4:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF2IC2: [[PRED_STORE_IF]]:
; VF2IC2: [[PRED_STORE_CONTINUE]]:
; VF2IC2: br i1 [[TMP7:%.*]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3:.*]]
; VF2IC2: [[PRED_STORE_IF2]]:
; VF2IC2: [[PRED_STORE_CONTINUE3]]:
; VF2IC2: br i1 [[TMP12:%.*]], label %[[PRED_STORE_IF4:.*]], label %[[PRED_STORE_CONTINUE5:.*]]
; VF2IC2: [[PRED_STORE_IF4]]:
; VF2IC2: [[PRED_STORE_CONTINUE5]]:
; VF2IC2: br i1 [[TMP17:%.*]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7:.*]]
; VF2IC2: [[PRED_STORE_IF6]]:
; VF2IC2: [[PRED_STORE_CONTINUE7]]:
; VF2IC2: br i1 [[TMP22:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !prof [[PROF1]], !llvm.loop [[LOOP16:![0-9]+]]
; VF2IC2: [[MIDDLE_BLOCK]]:
; VF2IC2: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]], !prof [[PROF6]]
; VF2IC2: [[SCALAR_PH]]:
; VF2IC2: [[LOOP:.*]]:
; VF2IC2: br i1 [[CMP:%.*]], label %[[IF_THEN:.*]], label %[[LATCH:.*]]
; VF2IC2: [[IF_THEN]]:
; VF2IC2: [[LATCH]]:
; VF2IC2: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !prof [[PROF8]], !llvm.loop [[LOOP17:![0-9]+]]
; VF2IC2: [[EXIT]]:
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %latch ]
%gep = getelementptr inbounds i32, ptr %a, i32 %iv
%val = load i32, ptr %gep, align 4
%cmp = icmp sgt i32 %val, 0
br i1 %cmp, label %if.then, label %latch
if.then:
%add = add i32 %val, 1
store i32 %add, ptr %gep, align 4
br label %latch
latch:
%iv.next = add nuw nsw i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %exit, label %loop, !prof !0
exit:
ret void
}
define void @predicated_store_almost_always_taken(ptr %a, i32 %n) {
; VF4IC1-LABEL: define void @predicated_store_almost_always_taken(
; VF4IC1-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; VF4IC1: [[ENTRY:.*:]]
; VF4IC1: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]], !prof [[PROF0]]
; VF4IC1: [[VECTOR_PH]]:
; VF4IC1: [[VECTOR_BODY:.*]]:
; VF4IC1: br i1 [[TMP3:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF4IC1: [[PRED_STORE_IF]]:
; VF4IC1: [[PRED_STORE_CONTINUE]]:
; VF4IC1: br i1 [[TMP5:%.*]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]
; VF4IC1: [[PRED_STORE_IF1]]:
; VF4IC1: [[PRED_STORE_CONTINUE2]]:
; VF4IC1: br i1 [[TMP9:%.*]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]
; VF4IC1: [[PRED_STORE_IF3]]:
; VF4IC1: [[PRED_STORE_CONTINUE4]]:
; VF4IC1: br i1 [[TMP13:%.*]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]]
; VF4IC1: [[PRED_STORE_IF5]]:
; VF4IC1: [[PRED_STORE_CONTINUE6]]:
; VF4IC1: br i1 [[TMP17:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !prof [[PROF1]], !llvm.loop [[LOOP18:![0-9]+]]
; VF4IC1: [[MIDDLE_BLOCK]]:
; VF4IC1: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]], !prof [[PROF6]]
; VF4IC1: [[SCALAR_PH]]:
; VF4IC1: [[LOOP:.*]]:
; VF4IC1: br i1 [[CMP:%.*]], label %[[IF_THEN:.*]], label %[[LATCH:.*]], !prof [[PROF19:![0-9]+]]
; VF4IC1: [[IF_THEN]]:
; VF4IC1: [[LATCH]]:
; VF4IC1: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !prof [[PROF8]], !llvm.loop [[LOOP20:![0-9]+]]
; VF4IC1: [[EXIT]]:
;
; VF2IC2-LABEL: define void @predicated_store_almost_always_taken(
; VF2IC2-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; VF2IC2: [[ENTRY:.*:]]
; VF2IC2: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]], !prof [[PROF0]]
; VF2IC2: [[VECTOR_PH]]:
; VF2IC2: [[VECTOR_BODY:.*]]:
; VF2IC2: br i1 [[TMP4:%.*]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
; VF2IC2: [[PRED_STORE_IF]]:
; VF2IC2: [[PRED_STORE_CONTINUE]]:
; VF2IC2: br i1 [[TMP7:%.*]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3:.*]]
; VF2IC2: [[PRED_STORE_IF2]]:
; VF2IC2: [[PRED_STORE_CONTINUE3]]:
; VF2IC2: br i1 [[TMP12:%.*]], label %[[PRED_STORE_IF4:.*]], label %[[PRED_STORE_CONTINUE5:.*]]
; VF2IC2: [[PRED_STORE_IF4]]:
; VF2IC2: [[PRED_STORE_CONTINUE5]]:
; VF2IC2: br i1 [[TMP17:%.*]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7:.*]]
; VF2IC2: [[PRED_STORE_IF6]]:
; VF2IC2: [[PRED_STORE_CONTINUE7]]:
; VF2IC2: br i1 [[TMP22:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !prof [[PROF1]], !llvm.loop [[LOOP18:![0-9]+]]
; VF2IC2: [[MIDDLE_BLOCK]]:
; VF2IC2: br i1 [[CMP_N:%.*]], label %[[EXIT:.*]], label %[[SCALAR_PH]], !prof [[PROF6]]
; VF2IC2: [[SCALAR_PH]]:
; VF2IC2: [[LOOP:.*]]:
; VF2IC2: br i1 [[CMP:%.*]], label %[[IF_THEN:.*]], label %[[LATCH:.*]], !prof [[PROF19:![0-9]+]]
; VF2IC2: [[IF_THEN]]:
; VF2IC2: [[LATCH]]:
; VF2IC2: br i1 [[EXITCOND:%.*]], label %[[EXIT]], label %[[LOOP]], !prof [[PROF8]], !llvm.loop [[LOOP20:![0-9]+]]
; VF2IC2: [[EXIT]]:
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %iv.next, %latch ]
%gep = getelementptr inbounds i32, ptr %a, i32 %iv
%val = load i32, ptr %gep, align 4
%cmp = icmp sgt i32 %val, 0
br i1 %cmp, label %if.then, label %latch, !prof !4
if.then:
%add = add i32 %val, 1
store i32 %add, ptr %gep, align 4
br label %latch
latch:
%iv.next = add nuw nsw i32 %iv, 1
%exitcond = icmp eq i32 %iv.next, %n
br i1 %exitcond, label %exit, label %loop, !prof !0
exit:
ret void
}
!0 = !{!"branch_weights", i32 1, i32 1000}
!1 = !{!"branch_weights", i32 1, i32 7}
!2 = !{!"branch_weights", i32 1, i32 1}
!3 = !{!"branch_weights", i32 1, i32 3}
!4 = !{!"branch_weights", i32 1000, i32 1}
;.
; VF4IC1: [[PROF0]] = !{!"branch_weights", i32 1, i32 127}
; VF4IC1: [[PROF1]] = !{!"branch_weights", i32 1, i32 249}
; VF4IC1: [[LOOP2]] = distinct !{[[LOOP2]], [[META3:![0-9]+]], [[META4:![0-9]+]], [[META5:![0-9]+]]}
; VF4IC1: [[META3]] = !{!"llvm.loop.isvectorized", i32 1}
; VF4IC1: [[META4]] = !{!"llvm.loop.unroll.runtime.disable"}
; VF4IC1: [[META5]] = !{!"llvm.loop.estimated_trip_count", i32 250}
; VF4IC1: [[PROF6]] = !{!"branch_weights", i32 1, i32 3}
; VF4IC1: [[PROF7]] = !{!"branch_weights", i32 1, i32 7}
; VF4IC1: [[PROF8]] = !{!"branch_weights", i32 1, i32 0}
; VF4IC1: [[LOOP9]] = distinct !{[[LOOP9]], [[META4]], [[META3]], [[META10:![0-9]+]]}
; VF4IC1: [[META10]] = !{!"llvm.loop.estimated_trip_count", i32 1}
; VF4IC1: [[LOOP11]] = distinct !{[[LOOP11]], [[META3]], [[META4]], [[META5]]}
; VF4IC1: [[PROF12]] = !{!"branch_weights", i32 1, i32 1}
; VF4IC1: [[LOOP13]] = distinct !{[[LOOP13]], [[META3]], [[META10]]}
; VF4IC1: [[LOOP14]] = distinct !{[[LOOP14]], [[META3]], [[META4]]}
; VF4IC1: [[LOOP15]] = distinct !{[[LOOP15]], [[META4]], [[META3]]}
; VF4IC1: [[LOOP16]] = distinct !{[[LOOP16]], [[META3]], [[META4]], [[META5]]}
; VF4IC1: [[LOOP17]] = distinct !{[[LOOP17]], [[META4]], [[META3]], [[META10]]}
; VF4IC1: [[LOOP18]] = distinct !{[[LOOP18]], [[META3]], [[META4]], [[META5]]}
; VF4IC1: [[PROF19]] = !{!"branch_weights", i32 1000, i32 1}
; VF4IC1: [[LOOP20]] = distinct !{[[LOOP20]], [[META4]], [[META3]], [[META10]]}
;.
; VF2IC2: [[PROF0]] = !{!"branch_weights", i32 1, i32 127}
; VF2IC2: [[PROF1]] = !{!"branch_weights", i32 1, i32 249}
; VF2IC2: [[LOOP2]] = distinct !{[[LOOP2]], [[META3:![0-9]+]], [[META4:![0-9]+]], [[META5:![0-9]+]]}
; VF2IC2: [[META3]] = !{!"llvm.loop.isvectorized", i32 1}
; VF2IC2: [[META4]] = !{!"llvm.loop.unroll.runtime.disable"}
; VF2IC2: [[META5]] = !{!"llvm.loop.estimated_trip_count", i32 250}
; VF2IC2: [[PROF6]] = !{!"branch_weights", i32 1, i32 3}
; VF2IC2: [[PROF7]] = !{!"branch_weights", i32 1, i32 7}
; VF2IC2: [[PROF8]] = !{!"branch_weights", i32 1, i32 0}
; VF2IC2: [[LOOP9]] = distinct !{[[LOOP9]], [[META4]], [[META3]], [[META10:![0-9]+]]}
; VF2IC2: [[META10]] = !{!"llvm.loop.estimated_trip_count", i32 1}
; VF2IC2: [[LOOP11]] = distinct !{[[LOOP11]], [[META3]], [[META4]], [[META5]]}
; VF2IC2: [[PROF12]] = !{!"branch_weights", i32 1, i32 1}
; VF2IC2: [[LOOP13]] = distinct !{[[LOOP13]], [[META3]], [[META10]]}
; VF2IC2: [[LOOP14]] = distinct !{[[LOOP14]], [[META3]], [[META4]]}
; VF2IC2: [[LOOP15]] = distinct !{[[LOOP15]], [[META4]], [[META3]]}
; VF2IC2: [[LOOP16]] = distinct !{[[LOOP16]], [[META3]], [[META4]], [[META5]]}
; VF2IC2: [[LOOP17]] = distinct !{[[LOOP17]], [[META4]], [[META3]], [[META10]]}
; VF2IC2: [[LOOP18]] = distinct !{[[LOOP18]], [[META3]], [[META4]], [[META5]]}
; VF2IC2: [[PROF19]] = !{!"branch_weights", i32 1000, i32 1}
; VF2IC2: [[LOOP20]] = distinct !{[[LOOP20]], [[META4]], [[META3]], [[META10]]}
;.