| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "^scalar.ph:" --version 6 | |
| ; RUN: opt -p loop-vectorize -enable-interleaved-mem-accesses -force-vector-width=4 -S %s | FileCheck %s | |
| define void @dep_between_interleaved_store_and_load_with_runtime_checks(ptr %a, ptr %b, i64 %off) { | |
| ; CHECK-LABEL: define void @dep_between_interleaved_store_and_load_with_runtime_checks( | |
| ; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[OFF:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: [[B_OFF:%.*]] = getelementptr i8, ptr [[B]], i64 [[OFF]] | |
| ; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]] | |
| ; CHECK: [[VECTOR_MEMCHECK]]: | |
| ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[A]], i64 800 | |
| ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[B]], i64 400 | |
| ; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[OFF]], 400 | |
| ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP2]] | |
| ; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[TMP1]] | |
| ; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[TMP0]] | |
| ; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] | |
| ; CHECK-NEXT: [[BOUND010:%.*]] = icmp ult ptr [[A]], [[TMP3]] | |
| ; CHECK-NEXT: [[BOUND111:%.*]] = icmp ult ptr [[B_OFF]], [[TMP0]] | |
| ; CHECK-NEXT: [[FOUND_CONFLICT12:%.*]] = and i1 [[BOUND010]], [[BOUND111]] | |
| ; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT12]] | |
| ; CHECK-NEXT: [[BOUND013:%.*]] = icmp ult ptr [[B]], [[TMP3]] | |
| ; CHECK-NEXT: [[BOUND114:%.*]] = icmp ult ptr [[B_OFF]], [[TMP1]] | |
| ; CHECK-NEXT: [[FOUND_CONFLICT15:%.*]] = and i1 [[BOUND013]], [[BOUND114]] | |
| ; CHECK-NEXT: [[CONFLICT_RDX16:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT15]] | |
| ; CHECK-NEXT: br i1 [[CONFLICT_RDX16]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] | |
| ; CHECK: [[VECTOR_PH]]: | |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] | |
| ; CHECK: [[VECTOR_BODY]]: | |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] | |
| ; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], 1 | |
| ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[INDEX]], 2 | |
| ; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[INDEX]], 3 | |
| ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[INDEX]] | |
| ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP15]] | |
| ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP16]] | |
| ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP17]] | |
| ; CHECK-NEXT: store i32 1, ptr [[TMP4]], align 4, !alias.scope [[META0:![0-9]+]], !noalias [[META3:![0-9]+]] | |
| ; CHECK-NEXT: store i32 1, ptr [[TMP8]], align 4, !alias.scope [[META0]], !noalias [[META3]] | |
| ; CHECK-NEXT: store i32 1, ptr [[TMP9]], align 4, !alias.scope [[META0]], !noalias [[META3]] | |
| ; CHECK-NEXT: store i32 1, ptr [[TMP10]], align 4, !alias.scope [[META0]], !noalias [[META3]] | |
| ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP4]], align 4, !alias.scope [[META0]], !noalias [[META3]] | |
| ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> | |
| ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[INDEX]], i64 1 | |
| ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP15]], i64 1 | |
| ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP16]], i64 1 | |
| ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP17]], i64 1 | |
| ; CHECK-NEXT: store i32 3, ptr [[TMP11]], align 4, !alias.scope [[META0]], !noalias [[META3]] | |
| ; CHECK-NEXT: store i32 3, ptr [[TMP12]], align 4, !alias.scope [[META0]], !noalias [[META3]] | |
| ; CHECK-NEXT: store i32 3, ptr [[TMP13]], align 4, !alias.scope [[META0]], !noalias [[META3]] | |
| ; CHECK-NEXT: store i32 3, ptr [[TMP14]], align 4, !alias.scope [[META0]], !noalias [[META3]] | |
| ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]] | |
| ; CHECK-NEXT: store <4 x i32> [[STRIDED_VEC]], ptr [[TMP5]], align 4, !alias.scope [[META6:![0-9]+]], !noalias [[META7:![0-9]+]] | |
| ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[B_OFF]], i64 [[INDEX]] | |
| ; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr [[TMP6]], align 4, !alias.scope [[META7]] | |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 | |
| ; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96 | |
| ; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] | |
| ; CHECK: [[MIDDLE_BLOCK]]: | |
| ; CHECK-NEXT: br label %[[SCALAR_PH]] | |
| ; CHECK: [[SCALAR_PH]]: | |
| ; | |
| entry: | |
| %b.off = getelementptr i8, ptr %b, i64 %off | |
| br label %loop | |
| loop: | |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] | |
| %gep.a.0 = getelementptr inbounds [2 x i32], ptr %a, i64 %iv | |
| store i32 1, ptr %gep.a.0, align 4 | |
| %l.a.0 = load i32, ptr %gep.a.0, align 4 | |
| %gep.a.1 = getelementptr inbounds [2 x i32], ptr %a, i64 %iv, i64 1 | |
| store i32 3, ptr %gep.a.1, align 4 | |
| %gep.b = getelementptr inbounds i32, ptr %b, i64 %iv | |
| store i32 %l.a.0, ptr %gep.b, align 4 | |
| %gep.b.off = getelementptr inbounds i32, ptr %b.off, i64 %iv | |
| store i32 0, ptr %gep.b.off, align 4 | |
| %iv.next = add nuw nsw i64 %iv, 1 | |
| %ec = icmp eq i64 %iv.next, 100 | |
| br i1 %ec, label %exit, label %loop | |
| exit: | |
| ret void | |
| } | |
| define void @dep_between_interleaved_store_and_load_with_unknown_dep_same_object(ptr %a, i64 %off) { | |
| ; CHECK-LABEL: define void @dep_between_interleaved_store_and_load_with_unknown_dep_same_object( | |
| ; CHECK-SAME: ptr [[A:%.*]], i64 [[OFF:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: [[A_OFF:%.*]] = getelementptr i8, ptr [[A]], i64 [[OFF]] | |
| ; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]] | |
| ; CHECK: [[VECTOR_MEMCHECK]]: | |
| ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[A]], i64 796 | |
| ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr nuw i8, ptr [[A]], i64 4 | |
| ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[A]], i64 800 | |
| ; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[OFF]], 796 | |
| ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]] | |
| ; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[TMP2]] | |
| ; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[TMP1]], [[TMP0]] | |
| ; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] | |
| ; CHECK-NEXT: [[BOUND011:%.*]] = icmp ult ptr [[A]], [[TMP4]] | |
| ; CHECK-NEXT: [[BOUND112:%.*]] = icmp ult ptr [[A_OFF]], [[TMP0]] | |
| ; CHECK-NEXT: [[FOUND_CONFLICT13:%.*]] = and i1 [[BOUND011]], [[BOUND112]] | |
| ; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT13]] | |
| ; CHECK-NEXT: [[BOUND014:%.*]] = icmp ult ptr [[TMP1]], [[TMP4]] | |
| ; CHECK-NEXT: [[BOUND115:%.*]] = icmp ult ptr [[A_OFF]], [[TMP2]] | |
| ; CHECK-NEXT: [[FOUND_CONFLICT16:%.*]] = and i1 [[BOUND014]], [[BOUND115]] | |
| ; CHECK-NEXT: [[CONFLICT_RDX17:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT16]] | |
| ; CHECK-NEXT: br i1 [[CONFLICT_RDX17]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] | |
| ; CHECK: [[VECTOR_PH]]: | |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] | |
| ; CHECK: [[VECTOR_BODY]]: | |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] | |
| ; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 1 | |
| ; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 2 | |
| ; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 3 | |
| ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[INDEX]] | |
| ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP5]] | |
| ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP6]] | |
| ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP7]] | |
| ; CHECK-NEXT: store i32 1, ptr [[TMP8]], align 4, !alias.scope [[META12:![0-9]+]], !noalias [[META15:![0-9]+]] | |
| ; CHECK-NEXT: store i32 1, ptr [[TMP9]], align 4, !alias.scope [[META12]], !noalias [[META15]] | |
| ; CHECK-NEXT: store i32 1, ptr [[TMP10]], align 4, !alias.scope [[META12]], !noalias [[META15]] | |
| ; CHECK-NEXT: store i32 1, ptr [[TMP11]], align 4, !alias.scope [[META12]], !noalias [[META15]] | |
| ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP8]], align 4, !alias.scope [[META12]], !noalias [[META15]] | |
| ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> | |
| ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[INDEX]], i64 1 | |
| ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP5]], i64 1 | |
| ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP6]], i64 1 | |
| ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 [[TMP7]], i64 1 | |
| ; CHECK-NEXT: store i32 3, ptr [[TMP12]], align 4, !alias.scope [[META18:![0-9]+]], !noalias [[META19:![0-9]+]] | |
| ; CHECK-NEXT: store i32 3, ptr [[TMP13]], align 4, !alias.scope [[META18]], !noalias [[META19]] | |
| ; CHECK-NEXT: store i32 3, ptr [[TMP14]], align 4, !alias.scope [[META18]], !noalias [[META19]] | |
| ; CHECK-NEXT: store i32 3, ptr [[TMP15]], align 4, !alias.scope [[META18]], !noalias [[META19]] | |
| ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i32], ptr [[A_OFF]], i64 [[INDEX]] | |
| ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [2 x i32], ptr [[A_OFF]], i64 [[TMP5]] | |
| ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i32], ptr [[A_OFF]], i64 [[TMP6]] | |
| ; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i32], ptr [[A_OFF]], i64 [[TMP7]] | |
| ; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 0 | |
| ; CHECK-NEXT: store i32 [[TMP20]], ptr [[TMP16]], align 4, !alias.scope [[META19]] | |
| ; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 1 | |
| ; CHECK-NEXT: store i32 [[TMP21]], ptr [[TMP17]], align 4, !alias.scope [[META19]] | |
| ; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 2 | |
| ; CHECK-NEXT: store i32 [[TMP22]], ptr [[TMP18]], align 4, !alias.scope [[META19]] | |
| ; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 3 | |
| ; CHECK-NEXT: store i32 [[TMP23]], ptr [[TMP19]], align 4, !alias.scope [[META19]] | |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 | |
| ; CHECK-NEXT: [[TMP24:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96 | |
| ; CHECK-NEXT: br i1 [[TMP24]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]] | |
| ; CHECK: [[MIDDLE_BLOCK]]: | |
| ; CHECK-NEXT: br label %[[SCALAR_PH]] | |
| ; CHECK: [[SCALAR_PH]]: | |
| ; | |
| entry: | |
| %a.off = getelementptr i8, ptr %a, i64 %off | |
| br label %loop | |
| loop: | |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] | |
| %gep.a.0 = getelementptr inbounds [2 x i32], ptr %a, i64 %iv | |
| store i32 1, ptr %gep.a.0, align 4 | |
| %l.a.0 = load i32, ptr %gep.a.0, align 4 | |
| %gep.a.1 = getelementptr inbounds [2 x i32], ptr %a, i64 %iv, i64 1 | |
| store i32 3, ptr %gep.a.1, align 4 | |
| %gep.a.off = getelementptr inbounds [2 x i32], ptr %a.off, i64 %iv | |
| store i32 %l.a.0, ptr %gep.a.off, align 4 | |
| %iv.next = add nuw nsw i64 %iv, 1 | |
| %ec = icmp eq i64 %iv.next, 100 | |
| br i1 %ec, label %exit, label %loop | |
| exit: | |
| ret void | |
| } | |
| ; The accesses to %B and %B.off have a non-constant distance, so LAA retries | |
| ; with runtime checks between them. The accesses to %A are only checked against | |
| ; the other objects, not against each other, so the forward dependence from | |
| ; the store to A[2 * i + 2] to the load of A[2 * (i + 1)] in the next iteration | |
| ; must still prevent the load from being hoisted above the store as part of an | |
| ; interleave group. | |
| define void @interleave_group_with_forward_dep_after_retry(ptr noalias %A, ptr noalias %C, ptr %B, i64 %off, i64 %n) { | |
| ; | |
| ; CHECK-LABEL: define void @interleave_group_with_forward_dep_after_retry( | |
| ; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[C:%.*]], ptr [[B:%.*]], i64 [[OFF:%.*]], i64 [[N:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: [[B_OFF:%.*]] = getelementptr i8, ptr [[B]], i64 [[OFF]] | |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i64 [[N]], 4 | |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] | |
| ; CHECK: [[VECTOR_MEMCHECK]]: | |
| ; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[OFF]], 1 | |
| ; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 15 | |
| ; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] | |
| ; CHECK: [[VECTOR_PH]]: | |
| ; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[N]], 3 | |
| ; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[TMP1]], 0 | |
| ; CHECK-NEXT: [[TMP24:%.*]] = select i1 [[TMP9]], i64 4, i64 [[TMP1]] | |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[TMP24]] | |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] | |
| ; CHECK: [[VECTOR_BODY]]: | |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] | |
| ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] | |
| ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]] | |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4 | |
| ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[B_OFF]], i64 [[INDEX]] | |
| ; CHECK-NEXT: store <4 x i32> [[WIDE_LOAD]], ptr [[TMP3]], align 4 | |
| ; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw <4 x i64> [[VEC_IND]], splat (i64 1) | |
| ; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP4]], i64 0 | |
| ; CHECK-NEXT: [[TMP6:%.*]] = or disjoint i64 [[TMP5]], 1 | |
| ; CHECK-NEXT: [[TMP7:%.*]] = add nuw nsw <4 x i64> [[TMP4]], splat (i64 2) | |
| ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP6]] | |
| ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP8]], align 4 | |
| ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> | |
| ; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i64> [[TMP7]], i64 0 | |
| ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP10]] | |
| ; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[TMP7]], i64 1 | |
| ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP12]] | |
| ; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i64> [[TMP7]], i64 2 | |
| ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP14]] | |
| ; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x i64> [[TMP7]], i64 3 | |
| ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP16]] | |
| ; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 0 | |
| ; CHECK-NEXT: store i32 [[TMP18]], ptr [[TMP11]], align 4 | |
| ; CHECK-NEXT: [[TMP19:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 1 | |
| ; CHECK-NEXT: store i32 [[TMP19]], ptr [[TMP13]], align 4 | |
| ; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 2 | |
| ; CHECK-NEXT: store i32 [[TMP20]], ptr [[TMP15]], align 4 | |
| ; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 3 | |
| ; CHECK-NEXT: store i32 [[TMP21]], ptr [[TMP17]], align 4 | |
| ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP5]] | |
| ; CHECK-NEXT: [[WIDE_VEC1:%.*]] = load <8 x i32>, ptr [[TMP25]], align 4 | |
| ; CHECK-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <8 x i32> [[WIDE_VEC1]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6> | |
| ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]] | |
| ; CHECK-NEXT: store <4 x i32> [[STRIDED_VEC2]], ptr [[TMP22]], align 4 | |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 | |
| ; CHECK-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <4 x i64> [[VEC_IND]], splat (i64 4) | |
| ; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] | |
| ; CHECK-NEXT: br i1 [[TMP23]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]] | |
| ; CHECK: [[MIDDLE_BLOCK]]: | |
| ; CHECK-NEXT: br label %[[SCALAR_PH]] | |
| ; CHECK: [[SCALAR_PH]]: | |
| ; | |
| entry: | |
| %B.off = getelementptr i8, ptr %B, i64 %off | |
| br label %loop | |
| loop: | |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] | |
| %gep.B = getelementptr inbounds i32, ptr %B, i64 %iv | |
| %l.B = load i32, ptr %gep.B, align 4 | |
| %gep.B.off = getelementptr inbounds i32, ptr %B.off, i64 %iv | |
| store i32 %l.B, ptr %gep.B.off, align 4 | |
| %iv.2 = shl nuw nsw i64 %iv, 1 | |
| %iv.2.1 = or disjoint i64 %iv.2, 1 | |
| %iv.2.2 = add nuw nsw i64 %iv.2, 2 | |
| %gep.A.1 = getelementptr inbounds i32, ptr %A, i64 %iv.2.1 | |
| %l.A.1 = load i32, ptr %gep.A.1, align 4 | |
| %gep.A.2 = getelementptr inbounds i32, ptr %A, i64 %iv.2.2 | |
| store i32 %l.A.1, ptr %gep.A.2, align 4 | |
| %gep.A.0 = getelementptr inbounds i32, ptr %A, i64 %iv.2 | |
| %l.A.0 = load i32, ptr %gep.A.0, align 4 | |
| %gep.C = getelementptr inbounds i32, ptr %C, i64 %iv | |
| store i32 %l.A.0, ptr %gep.C, align 4 | |
| %iv.next = add nuw nsw i64 %iv, 1 | |
| %ec = icmp eq i64 %iv.next, %n | |
| br i1 %ec, label %exit, label %loop | |
| exit: | |
| ret void | |
| } |