llvm/test/Transforms/LoopVectorize/bounded-load-vf-ranges.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
; RUN: opt -passes=loop-vectorize -force-vector-width=2 -S %s | FileCheck %s --check-prefix=VF2
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s --check-prefix=VF4
; RUN: opt -passes=loop-vectorize -force-vector-width=8 -S %s | FileCheck %s --check-prefix=VF8

define i32 @bounded_load_reduction_bound4(ptr %A) {
; VF2-LABEL: define i32 @bounded_load_reduction_bound4(
; VF2-SAME: ptr [[A:%.*]]) {
; VF2-NEXT:  [[ENTRY:.*]]:
; VF2-NEXT:    br label %[[LOOP:.*]]
; VF2:       [[LOOP]]:
; VF2-NEXT:    [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF2-NEXT:    [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; VF2-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 4
; VF2-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; VF2-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; VF2-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[LV]]
; VF2-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF2-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], 128
; VF2-NEXT:    br i1 [[COND]], label %[[EXIT:.*]], label %[[LOOP]]
; VF2:       [[EXIT]]:
; VF2-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]
; VF2-NEXT:    ret i32 [[R]]
;
; VF4-LABEL: define i32 @bounded_load_reduction_bound4(
; VF4-SAME: ptr [[A:%.*]]) {
; VF4-NEXT:  [[ENTRY:.*]]:
; VF4-NEXT:    br label %[[LOOP:.*]]
; VF4:       [[LOOP]]:
; VF4-NEXT:    [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF4-NEXT:    [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; VF4-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 4
; VF4-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; VF4-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; VF4-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[LV]]
; VF4-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF4-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], 128
; VF4-NEXT:    br i1 [[COND]], label %[[EXIT:.*]], label %[[LOOP]]
; VF4:       [[EXIT]]:
; VF4-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]
; VF4-NEXT:    ret i32 [[R]]
;
; VF8-LABEL: define i32 @bounded_load_reduction_bound4(
; VF8-SAME: ptr [[A:%.*]]) {
; VF8-NEXT:  [[ENTRY:.*]]:
; VF8-NEXT:    br label %[[LOOP:.*]]
; VF8:       [[LOOP]]:
; VF8-NEXT:    [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF8-NEXT:    [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; VF8-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 4
; VF8-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; VF8-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; VF8-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[LV]]
; VF8-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF8-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], 128
; VF8-NEXT:    br i1 [[COND]], label %[[EXIT:.*]], label %[[LOOP]]
; VF8:       [[EXIT]]:
; VF8-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]
; VF8-NEXT:    ret i32 [[R]]
;
entry:
  br label %loop

loop:
  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
  %sum = phi i32 [ 0, %entry ], [ %sum.next, %loop ]
  %bounded = urem i32 %iv, 4
  %gep.A = getelementptr inbounds i32, ptr %A, i32 %bounded
  %lv = load i32, ptr %gep.A
  %sum.next = add i32 %sum, %lv
  %iv.next = add nuw nsw i32 %iv, 1
  %cond = icmp eq i32 %iv.next, 128
  br i1 %cond, label %exit, label %loop

exit:
  %r = phi i32 [ %sum.next, %loop ]
  ret i32 %r
}

define i32 @bounded_load_reduction_bound8(ptr %A) {
; VF2-LABEL: define i32 @bounded_load_reduction_bound8(
; VF2-SAME: ptr [[A:%.*]]) {
; VF2-NEXT:  [[ENTRY:.*]]:
; VF2-NEXT:    br label %[[LOOP:.*]]
; VF2:       [[LOOP]]:
; VF2-NEXT:    [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF2-NEXT:    [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; VF2-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 8
; VF2-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; VF2-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; VF2-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[LV]]
; VF2-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF2-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], 128
; VF2-NEXT:    br i1 [[COND]], label %[[EXIT:.*]], label %[[LOOP]]
; VF2:       [[EXIT]]:
; VF2-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]
; VF2-NEXT:    ret i32 [[R]]
;
; VF4-LABEL: define i32 @bounded_load_reduction_bound8(
; VF4-SAME: ptr [[A:%.*]]) {
; VF4-NEXT:  [[ENTRY:.*]]:
; VF4-NEXT:    br label %[[LOOP:.*]]
; VF4:       [[LOOP]]:
; VF4-NEXT:    [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF4-NEXT:    [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; VF4-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 8
; VF4-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; VF4-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; VF4-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[LV]]
; VF4-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF4-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], 128
; VF4-NEXT:    br i1 [[COND]], label %[[EXIT:.*]], label %[[LOOP]]
; VF4:       [[EXIT]]:
; VF4-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]
; VF4-NEXT:    ret i32 [[R]]
;
; VF8-LABEL: define i32 @bounded_load_reduction_bound8(
; VF8-SAME: ptr [[A:%.*]]) {
; VF8-NEXT:  [[ENTRY:.*]]:
; VF8-NEXT:    br label %[[LOOP:.*]]
; VF8:       [[LOOP]]:
; VF8-NEXT:    [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF8-NEXT:    [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; VF8-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 8
; VF8-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; VF8-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; VF8-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[LV]]
; VF8-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF8-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], 128
; VF8-NEXT:    br i1 [[COND]], label %[[EXIT:.*]], label %[[LOOP]]
; VF8:       [[EXIT]]:
; VF8-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]
; VF8-NEXT:    ret i32 [[R]]
;
entry:
  br label %loop

loop:
  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
  %sum = phi i32 [ 0, %entry ], [ %sum.next, %loop ]
  %bounded = urem i32 %iv, 8
  %gep.A = getelementptr inbounds i32, ptr %A, i32 %bounded
  %lv = load i32, ptr %gep.A
  %sum.next = add i32 %sum, %lv
  %iv.next = add nuw nsw i32 %iv, 1
  %cond = icmp eq i32 %iv.next, 128
  br i1 %cond, label %exit, label %loop

exit:
  %r = phi i32 [ %sum.next, %loop ]
  ret i32 %r
}

define i32 @bounded_load_reduction_bound8_i8(ptr %A) {
; VF2-LABEL: define i32 @bounded_load_reduction_bound8_i8(
; VF2-SAME: ptr [[A:%.*]]) {
; VF2-NEXT:  [[ENTRY:.*]]:
; VF2-NEXT:    br label %[[LOOP:.*]]
; VF2:       [[LOOP]]:
; VF2-NEXT:    [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF2-NEXT:    [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; VF2-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 8
; VF2-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i8, ptr [[A]], i32 [[BOUNDED]]
; VF2-NEXT:    [[LV:%.*]] = load i8, ptr [[GEP_A]], align 1
; VF2-NEXT:    [[EXT:%.*]] = zext i8 [[LV]] to i32
; VF2-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[EXT]]
; VF2-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF2-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], 128
; VF2-NEXT:    br i1 [[COND]], label %[[EXIT:.*]], label %[[LOOP]]
; VF2:       [[EXIT]]:
; VF2-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]
; VF2-NEXT:    ret i32 [[R]]
;
; VF4-LABEL: define i32 @bounded_load_reduction_bound8_i8(
; VF4-SAME: ptr [[A:%.*]]) {
; VF4-NEXT:  [[ENTRY:.*]]:
; VF4-NEXT:    br label %[[LOOP:.*]]
; VF4:       [[LOOP]]:
; VF4-NEXT:    [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF4-NEXT:    [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; VF4-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 8
; VF4-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i8, ptr [[A]], i32 [[BOUNDED]]
; VF4-NEXT:    [[LV:%.*]] = load i8, ptr [[GEP_A]], align 1
; VF4-NEXT:    [[EXT:%.*]] = zext i8 [[LV]] to i32
; VF4-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[EXT]]
; VF4-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF4-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], 128
; VF4-NEXT:    br i1 [[COND]], label %[[EXIT:.*]], label %[[LOOP]]
; VF4:       [[EXIT]]:
; VF4-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]
; VF4-NEXT:    ret i32 [[R]]
;
; VF8-LABEL: define i32 @bounded_load_reduction_bound8_i8(
; VF8-SAME: ptr [[A:%.*]]) {
; VF8-NEXT:  [[ENTRY:.*]]:
; VF8-NEXT:    br label %[[LOOP:.*]]
; VF8:       [[LOOP]]:
; VF8-NEXT:    [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF8-NEXT:    [[SUM:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; VF8-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 8
; VF8-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i8, ptr [[A]], i32 [[BOUNDED]]
; VF8-NEXT:    [[LV:%.*]] = load i8, ptr [[GEP_A]], align 1
; VF8-NEXT:    [[EXT:%.*]] = zext i8 [[LV]] to i32
; VF8-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[EXT]]
; VF8-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF8-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], 128
; VF8-NEXT:    br i1 [[COND]], label %[[EXIT:.*]], label %[[LOOP]]
; VF8:       [[EXIT]]:
; VF8-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ]
; VF8-NEXT:    ret i32 [[R]]
;
entry:
  br label %loop

loop:
  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
  %sum = phi i32 [ 0, %entry ], [ %sum.next, %loop ]
  %bounded = urem i32 %iv, 8
  %gep.A = getelementptr inbounds i8, ptr %A, i32 %bounded
  %lv = load i8, ptr %gep.A
  %ext = zext i8 %lv to i32
  %sum.next = add i32 %sum, %ext
  %iv.next = add nuw nsw i32 %iv, 1
  %cond = icmp eq i32 %iv.next, 128
  br i1 %cond, label %exit, label %loop

exit:
  %r = phi i32 [ %sum.next, %loop ]
  ret i32 %r
}

; A read-modify-write of a bounded address `A[i % 4] += B[i]` has a hidden
; loop-carried dependence with distance 4 (iteration i + 4 reads what iteration
; i wrote).
define void @bounded_rmw_vf_capped(ptr noalias %A, ptr noalias %B, i32 %n) {
; VF2-LABEL: define void @bounded_rmw_vf_capped(
; VF2-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i32 [[N:%.*]]) {
; VF2-NEXT:  [[ENTRY:.*]]:
; VF2-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 2
; VF2-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]
; VF2:       [[VECTOR_SCEVCHECK]]:
; VF2-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -1
; VF2-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 3
; VF2-NEXT:    br i1 [[TMP1]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
; VF2:       [[VECTOR_PH]]:
; VF2-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 2
; VF2-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; VF2-NEXT:    br label %[[VECTOR_BODY:.*]]
; VF2:       [[VECTOR_BODY]]:
; VF2-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; VF2-NEXT:    [[TMP2:%.*]] = urem i32 [[INDEX]], 4
; VF2-NEXT:    [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP2]]
; VF2-NEXT:    [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP3]], align 4
; VF2-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[INDEX]]
; VF2-NEXT:    [[WIDE_LOAD1:%.*]] = load <2 x i32>, ptr [[TMP4]], align 4
; VF2-NEXT:    [[TMP5:%.*]] = add <2 x i32> [[WIDE_LOAD]], [[WIDE_LOAD1]]
; VF2-NEXT:    store <2 x i32> [[TMP5]], ptr [[TMP3]], align 4
; VF2-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
; VF2-NEXT:    [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; VF2-NEXT:    br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; VF2:       [[MIDDLE_BLOCK]]:
; VF2-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; VF2-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; VF2:       [[SCALAR_PH]]:
; VF2-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ]
; VF2-NEXT:    br label %[[LOOP:.*]]
; VF2:       [[LOOP]]:
; VF2-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF2-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 4
; VF2-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; VF2-NEXT:    [[A_V:%.*]] = load i32, ptr [[GEP_A]], align 4
; VF2-NEXT:    [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]]
; VF2-NEXT:    [[B_V:%.*]] = load i32, ptr [[GEP_B]], align 4
; VF2-NEXT:    [[SUM:%.*]] = add i32 [[A_V]], [[B_V]]
; VF2-NEXT:    store i32 [[SUM]], ptr [[GEP_A]], align 4
; VF2-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF2-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; VF2-NEXT:    br i1 [[COND]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; VF2:       [[EXIT]]:
; VF2-NEXT:    ret void
;
; VF4-LABEL: define void @bounded_rmw_vf_capped(
; VF4-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i32 [[N:%.*]]) {
; VF4-NEXT:  [[ENTRY:.*]]:
; VF4-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
; VF4-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]
; VF4:       [[VECTOR_SCEVCHECK]]:
; VF4-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -1
; VF4-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 3
; VF4-NEXT:    br i1 [[TMP1]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
; VF4:       [[VECTOR_PH]]:
; VF4-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 4
; VF4-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; VF4-NEXT:    br label %[[VECTOR_BODY:.*]]
; VF4:       [[VECTOR_BODY]]:
; VF4-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; VF4-NEXT:    [[TMP2:%.*]] = urem i32 [[INDEX]], 4
; VF4-NEXT:    [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP2]]
; VF4-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4
; VF4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[INDEX]]
; VF4-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP4]], align 4
; VF4-NEXT:    [[TMP5:%.*]] = add <4 x i32> [[WIDE_LOAD]], [[WIDE_LOAD1]]
; VF4-NEXT:    store <4 x i32> [[TMP5]], ptr [[TMP3]], align 4
; VF4-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
; VF4-NEXT:    [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; VF4-NEXT:    br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; VF4:       [[MIDDLE_BLOCK]]:
; VF4-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; VF4-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; VF4:       [[SCALAR_PH]]:
; VF4-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ]
; VF4-NEXT:    br label %[[LOOP:.*]]
; VF4:       [[LOOP]]:
; VF4-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF4-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 4
; VF4-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; VF4-NEXT:    [[A_V:%.*]] = load i32, ptr [[GEP_A]], align 4
; VF4-NEXT:    [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]]
; VF4-NEXT:    [[B_V:%.*]] = load i32, ptr [[GEP_B]], align 4
; VF4-NEXT:    [[SUM:%.*]] = add i32 [[A_V]], [[B_V]]
; VF4-NEXT:    store i32 [[SUM]], ptr [[GEP_A]], align 4
; VF4-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF4-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; VF4-NEXT:    br i1 [[COND]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; VF4:       [[EXIT]]:
; VF4-NEXT:    ret void
;
; VF8-LABEL: define void @bounded_rmw_vf_capped(
; VF8-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i32 [[N:%.*]]) {
; VF8-NEXT:  [[ENTRY:.*]]:
; VF8-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 8
; VF8-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]
; VF8:       [[VECTOR_SCEVCHECK]]:
; VF8-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -1
; VF8-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 3
; VF8-NEXT:    br i1 [[TMP1]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
; VF8:       [[VECTOR_PH]]:
; VF8-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 8
; VF8-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; VF8-NEXT:    br label %[[VECTOR_BODY:.*]]
; VF8:       [[VECTOR_BODY]]:
; VF8-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; VF8-NEXT:    [[TMP2:%.*]] = urem i32 [[INDEX]], 4
; VF8-NEXT:    [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP2]]
; VF8-NEXT:    [[WIDE_LOAD:%.*]] = load <8 x i32>, ptr [[TMP3]], align 4
; VF8-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[INDEX]]
; VF8-NEXT:    [[WIDE_LOAD1:%.*]] = load <8 x i32>, ptr [[TMP4]], align 4
; VF8-NEXT:    [[TMP5:%.*]] = add <8 x i32> [[WIDE_LOAD]], [[WIDE_LOAD1]]
; VF8-NEXT:    store <8 x i32> [[TMP5]], ptr [[TMP3]], align 4
; VF8-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8
; VF8-NEXT:    [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; VF8-NEXT:    br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; VF8:       [[MIDDLE_BLOCK]]:
; VF8-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; VF8-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; VF8:       [[SCALAR_PH]]:
; VF8-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ]
; VF8-NEXT:    br label %[[LOOP:.*]]
; VF8:       [[LOOP]]:
; VF8-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; VF8-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 4
; VF8-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; VF8-NEXT:    [[A_V:%.*]] = load i32, ptr [[GEP_A]], align 4
; VF8-NEXT:    [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]]
; VF8-NEXT:    [[B_V:%.*]] = load i32, ptr [[GEP_B]], align 4
; VF8-NEXT:    [[SUM:%.*]] = add i32 [[A_V]], [[B_V]]
; VF8-NEXT:    store i32 [[SUM]], ptr [[GEP_A]], align 4
; VF8-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; VF8-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; VF8-NEXT:    br i1 [[COND]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; VF8:       [[EXIT]]:
; VF8-NEXT:    ret void
;
entry:
  br label %loop

loop:
  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
  %bounded = urem i32 %iv, 4
  %gep.A = getelementptr inbounds i32, ptr %A, i32 %bounded
  %a.v = load i32, ptr %gep.A
  %gep.B = getelementptr inbounds i32, ptr %B, i32 %iv
  %b.v = load i32, ptr %gep.B
  %sum = add i32 %a.v, %b.v
  store i32 %sum, ptr %gep.A
  %iv.next = add nuw nsw i32 %iv, 1
  %cond = icmp eq i32 %iv.next, %n
  br i1 %cond, label %exit, label %loop

exit:
  ret void
}