llvm/test/Transforms/LoopVectorize/bounded-load-user-ic.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=4 -S %s | FileCheck %s --check-prefix=IC4
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=3 -S %s | FileCheck %s --check-prefix=IC3

define i32 @bounded_user_ic_exceeds_window(ptr %A, i32 %N) {
; IC4-LABEL: define i32 @bounded_user_ic_exceeds_window(
; IC4-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; IC4-NEXT:  [[ENTRY:.*]]:
; IC4-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 16
; IC4-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]
; IC4:       [[VECTOR_SCEVCHECK]]:
; IC4-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -1
; IC4-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 7
; IC4-NEXT:    br i1 [[TMP1]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
; IC4:       [[VECTOR_PH]]:
; IC4-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 16
; IC4-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; IC4-NEXT:    br label %[[VECTOR_BODY:.*]]
; IC4:       [[VECTOR_BODY]]:
; IC4-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; IC4-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ]
; IC4-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ]
; IC4-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP9:%.*]], %[[VECTOR_BODY]] ]
; IC4-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP10:%.*]], %[[VECTOR_BODY]] ]
; IC4-NEXT:    [[TMP2:%.*]] = urem i32 [[INDEX]], 8
; IC4-NEXT:    [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP2]]
; IC4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 4
; IC4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 8
; IC4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 12
; IC4-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4
; IC4-NEXT:    [[WIDE_LOAD4:%.*]] = load <4 x i32>, ptr [[TMP4]], align 4
; IC4-NEXT:    [[WIDE_LOAD5:%.*]] = load <4 x i32>, ptr [[TMP5]], align 4
; IC4-NEXT:    [[WIDE_LOAD6:%.*]] = load <4 x i32>, ptr [[TMP6]], align 4
; IC4-NEXT:    [[TMP7]] = add <4 x i32> [[VEC_PHI]], [[WIDE_LOAD]]
; IC4-NEXT:    [[TMP8]] = add <4 x i32> [[VEC_PHI1]], [[WIDE_LOAD4]]
; IC4-NEXT:    [[TMP9]] = add <4 x i32> [[VEC_PHI2]], [[WIDE_LOAD5]]
; IC4-NEXT:    [[TMP10]] = add <4 x i32> [[VEC_PHI3]], [[WIDE_LOAD6]]
; IC4-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 16
; IC4-NEXT:    [[TMP11:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; IC4-NEXT:    br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; IC4:       [[MIDDLE_BLOCK]]:
; IC4-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP8]], [[TMP7]]
; IC4-NEXT:    [[BIN_RDX7:%.*]] = add <4 x i32> [[TMP9]], [[BIN_RDX]]
; IC4-NEXT:    [[BIN_RDX8:%.*]] = add <4 x i32> [[TMP10]], [[BIN_RDX7]]
; IC4-NEXT:    [[TMP12:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX8]])
; IC4-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; IC4-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; IC4:       [[SCALAR_PH]]:
; IC4-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ]
; IC4-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP12]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ]
; IC4-NEXT:    br label %[[LOOP:.*]]
; IC4:       [[LOOP]]:
; IC4-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; IC4-NEXT:    [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; IC4-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 8
; IC4-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; IC4-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; IC4-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[LV]]
; IC4-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; IC4-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; IC4-NEXT:    br i1 [[COND]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; IC4:       [[EXIT]]:
; IC4-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ], [ [[TMP12]], %[[MIDDLE_BLOCK]] ]
; IC4-NEXT:    ret i32 [[R]]
;
; IC3-LABEL: define i32 @bounded_user_ic_exceeds_window(
; IC3-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; IC3-NEXT:  [[ENTRY:.*]]:
; IC3-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 12
; IC3-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]
; IC3:       [[VECTOR_SCEVCHECK]]:
; IC3-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -1
; IC3-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 7
; IC3-NEXT:    br i1 [[TMP1]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
; IC3:       [[VECTOR_PH]]:
; IC3-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 12
; IC3-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; IC3-NEXT:    br label %[[VECTOR_BODY:.*]]
; IC3:       [[VECTOR_BODY]]:
; IC3-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; IC3-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
; IC3-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ]
; IC3-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ]
; IC3-NEXT:    [[TMP2:%.*]] = urem i32 [[INDEX]], 8
; IC3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP2]]
; IC3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 4
; IC3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 8
; IC3-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4
; IC3-NEXT:    [[WIDE_LOAD3:%.*]] = load <4 x i32>, ptr [[TMP4]], align 4
; IC3-NEXT:    [[WIDE_LOAD4:%.*]] = load <4 x i32>, ptr [[TMP5]], align 4
; IC3-NEXT:    [[TMP6]] = add <4 x i32> [[VEC_PHI]], [[WIDE_LOAD]]
; IC3-NEXT:    [[TMP7]] = add <4 x i32> [[VEC_PHI1]], [[WIDE_LOAD3]]
; IC3-NEXT:    [[TMP8]] = add <4 x i32> [[VEC_PHI2]], [[WIDE_LOAD4]]
; IC3-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 12
; IC3-NEXT:    [[TMP9:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; IC3-NEXT:    br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; IC3:       [[MIDDLE_BLOCK]]:
; IC3-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP7]], [[TMP6]]
; IC3-NEXT:    [[BIN_RDX5:%.*]] = add <4 x i32> [[TMP8]], [[BIN_RDX]]
; IC3-NEXT:    [[TMP10:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX5]])
; IC3-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; IC3-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; IC3:       [[SCALAR_PH]]:
; IC3-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ]
; IC3-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ]
; IC3-NEXT:    br label %[[LOOP:.*]]
; IC3:       [[LOOP]]:
; IC3-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
; IC3-NEXT:    [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SUM_NEXT:%.*]], %[[LOOP]] ]
; IC3-NEXT:    [[BOUNDED:%.*]] = urem i32 [[IV]], 8
; IC3-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[BOUNDED]]
; IC3-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; IC3-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[LV]]
; IC3-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; IC3-NEXT:    [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; IC3-NEXT:    br i1 [[COND]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; IC3:       [[EXIT]]:
; IC3-NEXT:    [[R:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LOOP]] ], [ [[TMP10]], %[[MIDDLE_BLOCK]] ]
; IC3-NEXT:    ret i32 [[R]]
;
entry:
  br label %loop
loop:
  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
  %sum = phi i32 [ 0, %entry ], [ %sum.next, %loop ]
  %bounded = urem i32 %iv, 8
  %gep.A = getelementptr inbounds i32, ptr %A, i32 %bounded
  %lv = load i32, ptr %gep.A, align 4
  %sum.next = add i32 %sum, %lv
  %iv.next = add nuw nsw i32 %iv, 1
  %cond = icmp eq i32 %iv.next, %N
  br i1 %cond, label %exit, label %loop
exit:
  %r = phi i32 [ %sum.next, %loop ]
  ret i32 %r
}