llvm/test/Transforms/LoopVectorize/AArch64/early-exit-partial-reductions.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -p loop-vectorize -S %s | FileCheck %s

target triple = "arm64-apple-macosx"

; The extending add reduction would be a partial reduction, but is used on the
; early exit.
define i64 @partial_reduction_used_on_early_exit(ptr align 4 dereferenceable(4096) %src) {
; CHECK-LABEL: define i64 @partial_reduction_used_on_early_exit(
; CHECK-SAME: ptr align 4 dereferenceable(4096) [[SRC:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[LOOP_HEADER:.*]]
; CHECK:       [[LOOP_HEADER]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
; CHECK-NEXT:    [[RED:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[RED_NEXT:%.*]], %[[LOOP_LATCH]] ]
; CHECK-NEXT:    [[GEP:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[L:%.*]] = load i32, ptr [[GEP]], align 4
; CHECK-NEXT:    [[EXT:%.*]] = sext i32 [[L]] to i64
; CHECK-NEXT:    [[RED_NEXT]] = add i64 [[RED]], [[EXT]]
; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[L]], 0
; CHECK-NEXT:    br i1 [[CMP]], label %[[EARLY_EXIT:.*]], label %[[LOOP_LATCH]]
; CHECK:       [[LOOP_LATCH]]:
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 1024
; CHECK-NEXT:    br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP_HEADER]]
; CHECK:       [[EARLY_EXIT]]:
; CHECK-NEXT:    [[RED_EARLY:%.*]] = phi i64 [ [[RED_NEXT]], %[[LOOP_HEADER]] ]
; CHECK-NEXT:    ret i64 [[RED_EARLY]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    [[RED_NEXT_LCSSA1:%.*]] = phi i64 [ [[RED_NEXT]], %[[LOOP_LATCH]] ]
; CHECK-NEXT:    ret i64 [[RED_NEXT_LCSSA1]]
;
entry:
  br label %loop.header

loop.header:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
  %red = phi i64 [ 0, %entry ], [ %red.next, %loop.latch ]
  %gep = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %l = load i32, ptr %gep, align 4
  %ext = sext i32 %l to i64
  %red.next = add i64 %red, %ext
  %cmp = icmp eq i32 %l, 0
  br i1 %cmp, label %early.exit, label %loop.latch

loop.latch:
  %iv.next = add nuw nsw i64 %iv, 1
  %ec = icmp eq i64 %iv.next, 1024
  br i1 %ec, label %exit, label %loop.header

early.exit:
  %red.early = phi i64 [ %red.next, %loop.header ]
  ret i64 %red.early

exit:
  ret i64 %red.next
}