llvm/test/Transforms/LoopVectorize/AArch64/arith-costs.ll

; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --filter "[Cc]ost.*(udiv|fneg|fmul|not)"
; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize  %s -S -o - 2>&1 | FileCheck %s

; REQUIRES: asserts

target triple = "arm64-apple-macosx"

define void @udiv_rhs_opt_cost(ptr %dst) #0 {
; CHECK-LABEL: 'udiv_rhs_opt_cost'
; CHECK:  LV: Found an estimated cost of 5 for VF 1 For instruction: %div = udiv i8 %iv.trunc, 3
; CHECK:  Cost of 5 for VF 2: CLONE ir<%div> = udiv ir<%iv.trunc>, ir<3>
; CHECK:  Cost of 0 for VF 2: IR %div = udiv i8 %iv.trunc, 3
; CHECK:  Cost of 5 for VF 4: CLONE ir<%div> = udiv ir<%iv.trunc>, ir<3>
; CHECK:  Cost of 0 for VF 4: IR %div = udiv i8 %iv.trunc, 3
; CHECK:  Cost of 5 for VF vscale x 1: CLONE ir<%div> = udiv ir<%iv.trunc>, ir<3>
; CHECK:  Cost of 5 for VF vscale x 2: CLONE ir<%div> = udiv ir<%iv.trunc>, ir<3>
; CHECK:  Cost of 0 for VF vscale x 2: IR %div = udiv i8 %iv.trunc, 3
; CHECK:  Cost of 5 for VF vscale x 4: CLONE ir<%div> = udiv ir<%iv.trunc>, ir<3>
; CHECK:  Cost of 0 for VF vscale x 4: IR %div = udiv i8 %iv.trunc, 3
;
entry:
  br label %loop

loop:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
  %iv.trunc = trunc i64 %iv to i8
  %div = udiv i8 %iv.trunc, 3
  %div.ext = zext i8 %div to i64
  %gep.dst = getelementptr i32, ptr %dst, i64 %div.ext
  store i32 0, ptr %gep.dst, align 4
  %iv.next = add i64 %iv, 3
  %cmp = icmp ult i64 %iv, 117
  br i1 %cmp, label %loop, label %exit

exit:
  ret void
}

define void @fneg_used_by_fmul_scalar_cost_is_zero(ptr %dst) #0 {
; CHECK-LABEL: 'fneg_used_by_fmul_scalar_cost_is_zero'
; CHECK:  LV: Found an estimated cost of 0 for VF 1 For instruction: %neg = fneg double %conv
; CHECK:  LV: Found an estimated cost of 2 for VF 1 For instruction: %mul = fmul double %neg, 2.500000e-04
; CHECK:  Cost of 1 for VF 2: WIDEN ir<%neg> = fneg ir<%conv>
; CHECK:  Cost of 2 for VF 2: WIDEN ir<%mul> = fmul ir<%neg>, ir<2.500000e-04>
; CHECK:  Cost of 0 for VF 2: IR %neg = fneg double %conv
; CHECK:  Cost of 0 for VF 2: IR %mul = fmul double %neg, 2.500000e-04
; CHECK:  Cost of Invalid for VF vscale x 1: WIDEN ir<%neg> = fneg ir<%conv>
; CHECK:  Cost of Invalid for VF vscale x 1: WIDEN ir<%mul> = fmul ir<%neg>, ir<2.500000e-04>
; CHECK:  Cost of 1 for VF vscale x 2: WIDEN ir<%neg> = fneg ir<%conv>
; CHECK:  Cost of 2 for VF vscale x 2: WIDEN ir<%mul> = fmul ir<%neg>, ir<2.500000e-04>
; CHECK:  Cost of 0 for VF vscale x 2: IR %neg = fneg double %conv
; CHECK:  Cost of 0 for VF vscale x 2: IR %mul = fmul double %neg, 2.500000e-04
;
entry:
  br label %loop

loop:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
  %conv = uitofp i64 %iv to double
  %neg = fneg double %conv
  %mul = fmul double %neg, 2.500000e-04
  %gep.dst = getelementptr double, ptr %dst, i64 %iv
  store double %mul, ptr %gep.dst, align 8
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond = icmp eq i64 %iv.next, 1000
  br i1 %exitcond, label %exit, label %loop

exit:
  ret void
}

define i32 @test_scalar_and_widen_not_cost(ptr readonly %a, i64 noundef %n) {
; CHECK-LABEL: 'test_scalar_and_widen_not_cost'
; CHECK:  Cost of 1 for VF 2: EMIT vp<[[VP7:%[0-9]+]]> = not ir<%cmp1>
; CHECK:  Cost of 1 for VF 2: EMIT vp<[[VP12:%[0-9]+]]> = not vp<[[VP11:%[0-9]+]]>
; CHECK:  Cost of 1 for VF 4: EMIT vp<[[VP7]]> = not ir<%cmp1>
; CHECK:  Cost of 1 for VF 4: EMIT vp<[[VP12]]> = not vp<[[VP11]]>
; CHECK:  Cost of 1 for VF 8: EMIT vp<[[VP7]]> = not ir<%cmp1>
; CHECK:  Cost of 1 for VF 8: EMIT vp<[[VP12]]> = not vp<[[VP11]]>
; CHECK:  Cost of 1 for VF 16: EMIT vp<[[VP7]]> = not ir<%cmp1>
; CHECK:  Cost of 1 for VF 16: EMIT vp<[[VP12]]> = not vp<[[VP11]]>
; CHECK:  Cost of 2 for VF 32: EMIT vp<[[VP7]]> = not ir<%cmp1>
; CHECK:  Cost of 1 for VF 32: EMIT vp<[[VP12]]> = not vp<[[VP11]]>
; CHECK:  Cost of 4 for VF 64: EMIT vp<[[VP7]]> = not ir<%cmp1>
; CHECK:  Cost of 1 for VF 64: EMIT vp<[[VP12]]> = not vp<[[VP11]]>
; CHECK:  Cost of 8 for VF 128: EMIT vp<[[VP7]]> = not ir<%cmp1>
; CHECK:  Cost of 1 for VF 128: EMIT vp<[[VP12]]> = not vp<[[VP11]]>
; CHECK:  Cost of 1 for VF 16: EMIT vp<[[VP12]]> = not vp<[[VP11]]>
;
entry:
  br label %loop

loop:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
  %all.off.next = phi i1 [ true, %entry ], [ %all.off, %loop ]
  %any.0.off09 = phi i1 [ false, %entry ], [ %.any.0.off0, %loop ]
  %arrayidx = getelementptr inbounds float, ptr %a, i64 %iv
  %load1 = load float, ptr %arrayidx, align 4
  %cmp1 = fcmp olt float %load1, 0.000000e+00
  %.any.0.off0 = select i1 %cmp1, i1 true, i1 %any.0.off09
  %all.off = select i1 %cmp1, i1 %all.off.next, i1 false
  %iv.next = add nuw nsw i64 %iv, 1
  %ec = icmp eq i64 %iv.next, %n
  br i1 %ec, label %exit, label %loop

exit:
  %0 = select i1 %.any.0.off0, i32 2, i32 3
  %1 = select i1 %all.off, i32 1, i32 %0
  ret i32 %1
}

attributes #0 = { "target-cpu"="neoverse-v2" }