llvm/test/Transforms/LoopStrengthReduce/pr226063.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -passes=loop-reduce < %s | FileCheck %s

; %x has 30 known trailing zeros, so the i32 IV stride 4 * trunc(%x) is not a
; constant but folds to 0 once sign-extended to i64. Make sure LSR does not
; divide the i64 stride by it while collecting factors.

target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

declare void @use(i32)

define void @test(i64 range(i64 1073741824, 1073741825) %x) {
; CHECK-LABEL: define void @test(
; CHECK-SAME: i64 range(i64 1073741824, 1073741825) [[X:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    [[STEP:%.*]] = shl i64 [[X]], 2
; CHECK-NEXT:    [[TMP0:%.*]] = trunc i64 [[X]] to i32
; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[TMP0]], 2
; CHECK-NEXT:    br label %[[LOOP:.*]]
; CHECK:       [[LOOP]]:
; CHECK-NEXT:    [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2:%.*]], %[[LOOP]] ], [ 0, %[[ENTRY]] ]
; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], %[[LOOP]] ], [ 0, %[[ENTRY]] ]
; CHECK-NEXT:    call void @use(i32 [[LSR_IV]])
; CHECK-NEXT:    [[LSR_IV_NEXT]] = add i32 [[LSR_IV]], [[TMP1]]
; CHECK-NEXT:    [[LSR_IV_NEXT2]] = sub i64 [[LSR_IV1]], [[STEP]]
; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i64 [[LSR_IV_NEXT2]], 0
; CHECK-NEXT:    br i1 [[CMP]], label %[[EXIT:.*]], label %[[LOOP]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  %step = shl i64 %x, 2
  br label %loop

loop:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
  %iv.next = add i64 %iv, %step
  %t = trunc i64 %iv to i32
  call void @use(i32 %t)
  %cmp = icmp eq i64 %iv.next, 0
  br i1 %cmp, label %exit, label %loop

exit:
  ret void
}