llvm/test/Transforms/InstCombine/zext-sub-trunc.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes=instcombine -S | FileCheck %s

define i64 @test_scalar_mask(i64 %a) {
; CHECK-LABEL: define i64 @test_scalar_mask(
; CHECK-SAME: i64 [[A:%.*]]) {
; CHECK-NEXT:    [[TMP1:%.*]] = sub i64 0, [[A]]
; CHECK-NEXT:    [[ZEXT:%.*]] = and i64 [[TMP1]], 63
; CHECK-NEXT:    ret i64 [[ZEXT]]
;
  %trunc = trunc i64 %a to i6
  %neg = sub i6 0, %trunc
  %zext = zext i6 %neg to i64
  ret i64 %zext
}

define <8 x i64> @test_vector_mask_v8i64(<8 x i64> %a0) {
; CHECK-LABEL: define <8 x i64> @test_vector_mask_v8i64(
; CHECK-SAME: <8 x i64> [[A0:%.*]]) {
; CHECK-NEXT:    [[TMP1:%.*]] = sub <8 x i64> zeroinitializer, [[A0]]
; CHECK-NEXT:    [[ZEXT:%.*]] = and <8 x i64> [[TMP1]], splat (i64 63)
; CHECK-NEXT:    ret <8 x i64> [[ZEXT]]
;
  %trunc = trunc <8 x i64> %a0 to <8 x i6>
  %neg = sub <8 x i6> zeroinitializer, %trunc
  %zext = zext <8 x i6> %neg to <8 x i64>
  ret <8 x i64> %zext
}

define <8 x i32> @test_vector_mask_v8i32(<8 x i32> %a0) {
; CHECK-LABEL: define <8 x i32> @test_vector_mask_v8i32(
; CHECK-SAME: <8 x i32> [[A0:%.*]]) {
; CHECK-NEXT:    [[TMP1:%.*]] = sub <8 x i32> zeroinitializer, [[A0]]
; CHECK-NEXT:    [[ZEXT:%.*]] = and <8 x i32> [[TMP1]], splat (i32 15)
; CHECK-NEXT:    ret <8 x i32> [[ZEXT]]
;
  %trunc = trunc <8 x i32> %a0 to <8 x i4>
  %neg = sub <8 x i4> zeroinitializer, %trunc
  %zext = zext <8 x i4> %neg to <8 x i32>
  ret <8 x i32> %zext
}

; This must not be folded because the source and dest types of trunc/zext pair
; do not match
define <8 x i64> @test_negative_vector_mask_v8i32(<8 x i32> %a0) {
; CHECK-LABEL: define <8 x i64> @test_negative_vector_mask_v8i32(
; CHECK-SAME: <8 x i32> [[A0:%.*]]) {
; CHECK-NEXT:    [[TRUNC:%.*]] = trunc <8 x i32> [[A0]] to <8 x i4>
; CHECK-NEXT:    [[NEG:%.*]] = sub <8 x i4> zeroinitializer, [[TRUNC]]
; CHECK-NEXT:    [[ZEXT:%.*]] = zext <8 x i4> [[NEG]] to <8 x i64>
; CHECK-NEXT:    ret <8 x i64> [[ZEXT]]
;
  %trunc = trunc <8 x i32> %a0 to <8 x i4>
  %neg = sub <8 x i4> zeroinitializer, %trunc
  %zext = zext <8 x i4> %neg to <8 x i64>
  ret <8 x i64> %zext
}