llvm/test/Transforms/InstCombine/fold-vp-load.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -p instcombine < %s | FileCheck %s

define <vscale x 8 x i16> @bitcast_vp_load_scalable(ptr %p) {
; CHECK-LABEL: define <vscale x 8 x i16> @bitcast_vp_load_scalable(
; CHECK-SAME: ptr [[P:%.*]]) {
; CHECK-NEXT:    [[R:%.*]] = call <vscale x 8 x i16> @llvm.vp.load.nxv8i16.p0(ptr align 16 [[P]], <vscale x 8 x i1> splat (i1 true), i32 4)
; CHECK-NEXT:    ret <vscale x 8 x i16> [[R]]
;
  %l = call <vscale x 4 x i32> @llvm.vp.load(ptr %p, <vscale x 4 x i1> splat (i1 true), i32 2)
  %r = bitcast <vscale x 4 x i32> %l to <vscale x 8 x i16>
  ret <vscale x 8 x i16> %r
}

define <vscale x 8 x i16> @bitcast_vp_load_scalable_evl(ptr %p, i32 %evl) {
; CHECK-LABEL: define <vscale x 8 x i16> @bitcast_vp_load_scalable_evl(
; CHECK-SAME: ptr [[P:%.*]], i32 [[EVL:%.*]]) {
; CHECK-NEXT:    [[TMP1:%.*]] = shl nuw i32 [[EVL]], 1
; CHECK-NEXT:    [[R:%.*]] = call <vscale x 8 x i16> @llvm.vp.load.nxv8i16.p0(ptr align 16 [[P]], <vscale x 8 x i1> splat (i1 true), i32 [[TMP1]])
; CHECK-NEXT:    ret <vscale x 8 x i16> [[R]]
;
  %l = call <vscale x 4 x i32> @llvm.vp.load(ptr %p, <vscale x 4 x i1> splat (i1 true), i32 %evl)
  %r = bitcast <vscale x 4 x i32> %l to <vscale x 8 x i16>
  ret <vscale x 8 x i16> %r
}

define <vscale x 8 x i16> @bitcast_vp_load_scalable_preserve_align(ptr %p, i32 %evl) {
; CHECK-LABEL: define <vscale x 8 x i16> @bitcast_vp_load_scalable_preserve_align(
; CHECK-SAME: ptr [[P:%.*]], i32 [[EVL:%.*]]) {
; CHECK-NEXT:    [[TMP1:%.*]] = shl nuw i32 [[EVL]], 1
; CHECK-NEXT:    [[R:%.*]] = call <vscale x 8 x i16> @llvm.vp.load.nxv8i16.p0(ptr align 4 [[P]], <vscale x 8 x i1> splat (i1 true), i32 [[TMP1]])
; CHECK-NEXT:    ret <vscale x 8 x i16> [[R]]
;
  %l = call <vscale x 4 x i32> @llvm.vp.load(ptr align 4 %p, <vscale x 4 x i1> splat (i1 true), i32 %evl)
  %r = bitcast <vscale x 4 x i32> %l to <vscale x 8 x i16>
  ret <vscale x 8 x i16> %r
}

define <8 x i16> @bitcast_vp_load_fixed_evl(ptr %p, i32 %evl) {
; CHECK-LABEL: define <8 x i16> @bitcast_vp_load_fixed_evl(
; CHECK-SAME: ptr [[P:%.*]], i32 [[EVL:%.*]]) {
; CHECK-NEXT:    [[TMP1:%.*]] = shl nuw i32 [[EVL]], 1
; CHECK-NEXT:    [[R:%.*]] = call <8 x i16> @llvm.vp.load.v8i16.p0(ptr align 16 [[P]], <8 x i1> splat (i1 true), i32 [[TMP1]])
; CHECK-NEXT:    ret <8 x i16> [[R]]
;
  %l = call <4 x i32> @llvm.vp.load(ptr %p, <4 x i1> splat (i1 true), i32 %evl)
  %r = bitcast <4 x i32> %l to <8 x i16>
  ret <8 x i16> %r
}

define <vscale x 2 x i64> @negative_bitcast_vp_load_scalable(ptr %p) {
; CHECK-LABEL: define <vscale x 2 x i64> @negative_bitcast_vp_load_scalable(
; CHECK-SAME: ptr [[P:%.*]]) {
; CHECK-NEXT:    [[L:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr [[P]], <vscale x 4 x i1> splat (i1 true), i32 3)
; CHECK-NEXT:    [[R:%.*]] = bitcast <vscale x 4 x i32> [[L]] to <vscale x 2 x i64>
; CHECK-NEXT:    ret <vscale x 2 x i64> [[R]]
;
  %l = call <vscale x 4 x i32> @llvm.vp.load(ptr %p, <vscale x 4 x i1> splat (i1 true), i32 3)
  %r = bitcast <vscale x 4 x i32> %l to <vscale x 2 x i64>
  ret <vscale x 2 x i64> %r
}

define <vscale x 8 x i16> @negative_bitcast_vp_load_scalable_mask(ptr %p, <vscale x 4 x i1> %m) {
; CHECK-LABEL: define <vscale x 8 x i16> @negative_bitcast_vp_load_scalable_mask(
; CHECK-SAME: ptr [[P:%.*]], <vscale x 4 x i1> [[M:%.*]]) {
; CHECK-NEXT:    [[L:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr [[P]], <vscale x 4 x i1> [[M]], i32 2)
; CHECK-NEXT:    [[R:%.*]] = bitcast <vscale x 4 x i32> [[L]] to <vscale x 8 x i16>
; CHECK-NEXT:    ret <vscale x 8 x i16> [[R]]
;
  %l = call <vscale x 4 x i32> @llvm.vp.load(ptr %p, <vscale x 4 x i1> %m, i32 2)
  %r = bitcast <vscale x 4 x i32> %l to <vscale x 8 x i16>
  ret <vscale x 8 x i16> %r
}