blob: 55126192c16bc78d9d13812318e81994e4527c3f [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s
; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 < %s | FileCheck %s
define i8 @hoist_bitcast_i256_to_v32i8(ptr %a0) {
; CHECK-LABEL: @hoist_bitcast_i256_to_v32i8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SRC256:%.*]] = load i256, ptr [[A0:%.*]], align 1
; CHECK-NEXT: [[SRC256_BITCAST:%.*]] = bitcast i256 [[SRC256]] to <32 x i8>
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i256 [[SRC256]], 0
; CHECK-NEXT: br i1 [[ISZERO]], label [[EXIT:%.*]], label [[REDUCTION:%.*]]
; CHECK: reduction:
; CHECK-NEXT: [[RED:%.*]] = call i8 @llvm.vector.reduce.umax.v32i8(<32 x i8> [[SRC256_BITCAST]])
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i8 [ 0, [[ENTRY:%.*]] ], [ [[RED]], [[REDUCTION]] ]
; CHECK-NEXT: ret i8 [[RESULT]]
;
entry:
%src256 = load i256, ptr %a0, align 1
%iszero = icmp eq i256 %src256, 0
br i1 %iszero, label %exit, label %reduction
reduction:
%src256.bitcast = bitcast i256 %src256 to <32 x i8>
%red = call i8 @llvm.vector.reduce.umax.v32i8(<32 x i8> %src256.bitcast)
br label %exit
exit:
%result = phi i8 [ 0, %entry ], [ %red, %reduction ]
ret i8 %result
}
define i8 @test_legal_i64(ptr %a0) {
; CHECK-LABEL: @test_legal_i64(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SRC64:%.*]] = load i64, ptr [[A0:%.*]], align 8
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i64 [[SRC64]], 0
; CHECK-NEXT: br i1 [[ISZERO]], label [[EXIT:%.*]], label [[REDUCTION:%.*]]
; CHECK: reduction:
; CHECK-NEXT: [[SRC64_BITCAST:%.*]] = bitcast i64 [[SRC64]] to <8 x i8>
; CHECK-NEXT: [[RED:%.*]] = call i8 @llvm.vector.reduce.umax.v8i8(<8 x i8> [[SRC64_BITCAST]])
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i8 [ 0, [[ENTRY:%.*]] ], [ [[RED]], [[REDUCTION]] ]
; CHECK-NEXT: ret i8 [[RESULT]]
;
entry:
%src64 = load i64, ptr %a0, align 8
%iszero = icmp eq i64 %src64, 0
br i1 %iszero, label %exit, label %reduction
reduction:
%src64.bitcast = bitcast i64 %src64 to <8 x i8>
%red = call i8 @llvm.vector.reduce.umax.v8i8(<8 x i8> %src64.bitcast)
br label %exit
exit:
%result = phi i8 [ 0, %entry ], [ %red, %reduction ]
ret i8 %result
}