blob: fbe189abcac8c9df07949365ef29817832d20618 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s
define void @PR233185(ptr %pa, ptr %pb, ptr %po) {
; CHECK-LABEL: PR233185:
; CHECK: # %bb.0:
; CHECK-NEXT: vmovaps (%rdi), %ymm0
; CHECK-NEXT: vmovaps 32(%rdi), %ymm1
; CHECK-NEXT: vmovaps (%rsi), %ymm2
; CHECK-NEXT: vmovaps 32(%rsi), %ymm3
; CHECK-NEXT: vandps %ymm0, %ymm2, %ymm4
; CHECK-NEXT: vandps %ymm1, %ymm3, %ymm5
; CHECK-NEXT: vblendps {{.*#+}} ymm4 = ymm5[0,1,2,3],ymm4[4,5],ymm5[6,7]
; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm6
; CHECK-NEXT: vunpckhpd {{.*#+}} ymm2 = ymm6[1],ymm2[1],ymm6[3],ymm2[3]
; CHECK-NEXT: vblendps {{.*#+}} xmm3 = mem[0,1],xmm3[2,3]
; CHECK-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-NEXT: vextractf128 $1, %ymm4, %xmm6
; CHECK-NEXT: vpcmpgtq %xmm0, %xmm6, %xmm7
; CHECK-NEXT: vblendvpd %xmm7, %xmm6, %xmm0, %xmm0
; CHECK-NEXT: vpcmpgtq %xmm3, %xmm5, %xmm7
; CHECK-NEXT: vblendvpd %xmm7, %xmm5, %xmm3, %xmm3
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm3, %ymm0
; CHECK-NEXT: vextractf128 $1, %ymm2, %xmm2
; CHECK-NEXT: vpcmpgtq %xmm2, %xmm6, %xmm3
; CHECK-NEXT: vblendvpd %xmm3, %xmm6, %xmm2, %xmm2
; CHECK-NEXT: vpcmpgtq %xmm1, %xmm5, %xmm3
; CHECK-NEXT: vblendvpd %xmm3, %xmm5, %xmm1, %xmm1
; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; CHECK-NEXT: vxorps %ymm4, %ymm1, %ymm1
; CHECK-NEXT: vxorps %ymm4, %ymm0, %ymm0
; CHECK-NEXT: vmovaps %ymm0, 32(%rdx)
; CHECK-NEXT: vmovaps %ymm1, (%rdx)
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: retq
%v0 = load <8 x i64>, ptr %pa, align 64
%v1 = load <8 x i64>, ptr %pb, align 64
%and = and <8 x i64> %v1, %v0
%shuffle = shufflevector <8 x i64> %and, <8 x i64> poison, <4 x i32> <i32 4, i32 5, i32 2, i32 7>
%shuffle1 = shufflevector <4 x i64> %shuffle, <4 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
%shuffle2 = shufflevector <8 x i64> %v0, <8 x i64> %v1, <8 x i32> <i32 4, i32 poison, i32 9, i32 11, i32 10, i32 13, i32 4, i32 0>
%elt.max = tail call <8 x i64> @llvm.smax.v8i64(<8 x i64> %shuffle1, <8 x i64> %shuffle2)
%xor = xor <8 x i64> %elt.max, %shuffle1
store <8 x i64> %xor, ptr %po, align 64
ret void
}