llvm/test/CodeGen/X86/fp80-conv-libcalls.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=x86_64-linux-gnu    -mattr=+sse < %s | FileCheck %s --check-prefix=GNU
; RUN: llc -mtriple=x86_64-linux-android -mattr=+sse < %s | FileCheck %s --check-prefix=ANDROID
; RUN: llc -mtriple=x86_64-pc-windows-msvc          < %s | FileCheck %s --check-prefix=MSVC

; The x86_fp80 compiler-rt helpers are keyed to the IR type, which is legal on
; all x86 regardless of the long double format, so they are available even when
; long double is not x87 (IEEE double on windows-msvc, IEEE quad on Android).

define fp128 @test_extend(x86_fp80 %x) nounwind {
; GNU-LABEL: test_extend:
; GNU:       # %bb.0:
; GNU-NEXT:    jmp __extendxftf2@PLT # TAILCALL
;
; ANDROID-LABEL: test_extend:
; ANDROID:       # %bb.0:
; ANDROID-NEXT:    jmp __extendxftf2@PLT # TAILCALL
;
; MSVC-LABEL: test_extend:
; MSVC:       # %bb.0:
; MSVC-NEXT:    pushq %rsi
; MSVC-NEXT:    subq $64, %rsp
; MSVC-NEXT:    movq %rcx, %rsi
; MSVC-NEXT:    fldt (%rdx)
; MSVC-NEXT:    fstpt {{[0-9]+}}(%rsp)
; MSVC-NEXT:    leaq {{[0-9]+}}(%rsp), %rcx
; MSVC-NEXT:    leaq {{[0-9]+}}(%rsp), %rdx
; MSVC-NEXT:    callq __extendxftf2
; MSVC-NEXT:    movaps {{[0-9]+}}(%rsp), %xmm0
; MSVC-NEXT:    movaps %xmm0, (%rsi)
; MSVC-NEXT:    movq %rsi, %rax
; MSVC-NEXT:    addq $64, %rsp
; MSVC-NEXT:    popq %rsi
; MSVC-NEXT:    retq
  %r = fpext x86_fp80 %x to fp128
  ret fp128 %r
}

define x86_fp80 @test_trunc(fp128 %x) nounwind {
; GNU-LABEL: test_trunc:
; GNU:       # %bb.0:
; GNU-NEXT:    pushq %rax
; GNU-NEXT:    callq __trunctfxf2@PLT
; GNU-NEXT:    popq %rax
; GNU-NEXT:    retq
;
; ANDROID-LABEL: test_trunc:
; ANDROID:       # %bb.0:
; ANDROID-NEXT:    pushq %rax
; ANDROID-NEXT:    callq __trunctfxf2@PLT
; ANDROID-NEXT:    popq %rax
; ANDROID-NEXT:    retq
;
; MSVC-LABEL: test_trunc:
; MSVC:       # %bb.0:
; MSVC-NEXT:    pushq %rsi
; MSVC-NEXT:    subq $64, %rsp
; MSVC-NEXT:    movq %rcx, %rsi
; MSVC-NEXT:    movaps (%rdx), %xmm0
; MSVC-NEXT:    movaps %xmm0, {{[0-9]+}}(%rsp)
; MSVC-NEXT:    leaq {{[0-9]+}}(%rsp), %rcx
; MSVC-NEXT:    leaq {{[0-9]+}}(%rsp), %rdx
; MSVC-NEXT:    callq __trunctfxf2
; MSVC-NEXT:    fldt {{[0-9]+}}(%rsp)
; MSVC-NEXT:    fstpt (%rsi)
; MSVC-NEXT:    movq %rsi, %rax
; MSVC-NEXT:    addq $64, %rsp
; MSVC-NEXT:    popq %rsi
; MSVC-NEXT:    retq
  %r = fptrunc fp128 %x to x86_fp80
  ret x86_fp80 %r
}

define i128 @test_fptosi(x86_fp80 %x) nounwind {
; GNU-LABEL: test_fptosi:
; GNU:       # %bb.0:
; GNU-NEXT:    subq $24, %rsp
; GNU-NEXT:    fldt {{[0-9]+}}(%rsp)
; GNU-NEXT:    fstpt (%rsp)
; GNU-NEXT:    callq __fixxfti@PLT
; GNU-NEXT:    addq $24, %rsp
; GNU-NEXT:    retq
;
; ANDROID-LABEL: test_fptosi:
; ANDROID:       # %bb.0:
; ANDROID-NEXT:    subq $24, %rsp
; ANDROID-NEXT:    fldt {{[0-9]+}}(%rsp)
; ANDROID-NEXT:    fstpt (%rsp)
; ANDROID-NEXT:    callq __fixxfti@PLT
; ANDROID-NEXT:    addq $24, %rsp
; ANDROID-NEXT:    retq
;
; MSVC-LABEL: test_fptosi:
; MSVC:       # %bb.0:
; MSVC-NEXT:    subq $56, %rsp
; MSVC-NEXT:    fldt (%rcx)
; MSVC-NEXT:    fstpt {{[0-9]+}}(%rsp)
; MSVC-NEXT:    leaq {{[0-9]+}}(%rsp), %rcx
; MSVC-NEXT:    callq __fixxfti
; MSVC-NEXT:    movq %xmm0, %rax
; MSVC-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; MSVC-NEXT:    movq %xmm0, %rdx
; MSVC-NEXT:    addq $56, %rsp
; MSVC-NEXT:    retq
  %r = fptosi x86_fp80 %x to i128
  ret i128 %r
}

define x86_fp80 @test_powi(x86_fp80 %x, i32 %n) nounwind {
; GNU-LABEL: test_powi:
; GNU:       # %bb.0:
; GNU-NEXT:    subq $24, %rsp
; GNU-NEXT:    fldt {{[0-9]+}}(%rsp)
; GNU-NEXT:    fstpt (%rsp)
; GNU-NEXT:    callq __powixf2@PLT
; GNU-NEXT:    addq $24, %rsp
; GNU-NEXT:    retq
;
; ANDROID-LABEL: test_powi:
; ANDROID:       # %bb.0:
; ANDROID-NEXT:    subq $24, %rsp
; ANDROID-NEXT:    fldt {{[0-9]+}}(%rsp)
; ANDROID-NEXT:    fstpt (%rsp)
; ANDROID-NEXT:    callq __powixf2@PLT
; ANDROID-NEXT:    addq $24, %rsp
; ANDROID-NEXT:    retq
;
; MSVC-LABEL: test_powi:
; MSVC:       # %bb.0:
; MSVC-NEXT:    pushq %rsi
; MSVC-NEXT:    subq $64, %rsp
; MSVC-NEXT:    movq %rcx, %rsi
; MSVC-NEXT:    fldt (%rdx)
; MSVC-NEXT:    fstpt {{[0-9]+}}(%rsp)
; MSVC-NEXT:    leaq {{[0-9]+}}(%rsp), %rcx
; MSVC-NEXT:    leaq {{[0-9]+}}(%rsp), %rdx
; MSVC-NEXT:    callq __powixf2
; MSVC-NEXT:    fldt {{[0-9]+}}(%rsp)
; MSVC-NEXT:    fstpt (%rsi)
; MSVC-NEXT:    movq %rsi, %rax
; MSVC-NEXT:    addq $64, %rsp
; MSVC-NEXT:    popq %rsi
; MSVC-NEXT:    retq
  %r = call x86_fp80 @llvm.powi.f80.i32(x86_fp80 %x, i32 %n)
  ret x86_fp80 %r
}