llvm/test/CodeGen/X86/fast-isel-dead-implicit-defs.ll

; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 -stop-after=finalize-isel < %s | FileCheck %s

; The implicit $eflags def is unused.
define i32 @add(i32 %a, i32 %b) {
  ; CHECK-LABEL: name: add
  ; CHECK: bb.0 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $edi, $esi
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY $esi
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY $edi
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gr32 = COPY [[COPY1]]
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY]]
  ; CHECK-NEXT:   [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr [[COPY2]], [[COPY3]], implicit-def dead $eflags
  ; CHECK-NEXT:   $eax = COPY [[ADD32rr]]
  ; CHECK-NEXT:   RET64 implicit $eax
  %r = add i32 %a, %b
  ret i32 %r
}

; The implicit $eflags def is read by the SETcc.
define i32 @uaddo(i32 %a, i32 %b) {
  ; CHECK-LABEL: name: uaddo
  ; CHECK: bb.0 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $edi, $esi
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY $esi
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY $edi
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gr32 = COPY [[COPY1]]
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY]]
  ; CHECK-NEXT:   [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr [[COPY2]], [[COPY3]], implicit-def $eflags
  ; CHECK-NEXT:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
  ; CHECK-NEXT:   [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[SETCCr]], 1, implicit-def dead $eflags
  ; CHECK-NEXT:   [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[AND8ri]]
  ; CHECK-NEXT:   $eax = COPY [[MOVZX32rr8_]]
  ; CHECK-NEXT:   RET64 implicit $eax
  %t = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
  %o = extractvalue { i32, i1 } %t, 1
  %z = zext i1 %o to i32
  ret i32 %z
}

; $edx is unused, but the implicit $eflags def is read by the SETcc.
define i32 @umulo(i32 %a, i32 %b) {
  ; CHECK-LABEL: name: umulo
  ; CHECK: bb.0 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $edi, $esi
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY $esi
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY $edi
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gr32 = COPY [[COPY1]]
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gr32 = COPY [[COPY]]
  ; CHECK-NEXT:   $eax = COPY [[COPY2]]
  ; CHECK-NEXT:   MUL32r [[COPY3]], implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:gr32 = COPY $eax
  ; CHECK-NEXT:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
  ; CHECK-NEXT:   [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[SETCCr]], 1, implicit-def dead $eflags
  ; CHECK-NEXT:   [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[AND8ri]]
  ; CHECK-NEXT:   $eax = COPY [[MOVZX32rr8_]]
  ; CHECK-NEXT:   RET64 implicit $eax
  %t = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
  %o = extractvalue { i32, i1 } %t, 1
  %z = zext i1 %o to i32
  ret i32 %z
}