llvm/test/CodeGen/SPARC/inlineasm-cc-clobber.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=sparc < %s | FileCheck %s --check-prefix=V8
; RUN: llc -mtriple=sparcv9 < %s | FileCheck %s --check-prefix=V9

;; The integer and floating-point condition codes clobbered by inline assembly
;; must not be live across it, so the compares must stay after the asm.

define i32 @clobber_cc(i32 %a, i32 %b) nounwind {
; V8-LABEL: clobber_cc:
; V8:       ! %bb.0:
; V8-NEXT:    save %sp, -96, %sp
; V8-NEXT:    !APP
; V8-NEXT:    cmp %g0, 1
; V8-NEXT:    !NO_APP
; V8-NEXT:    cmp %i0, %i1
; V8-NEXT:    bcs .LBB0_2
; V8-NEXT:    nop
; V8-NEXT:  ! %bb.1:
; V8-NEXT:    ret
; V8-NEXT:    restore %g0, 20, %o0
; V8-NEXT:  .LBB0_2:
; V8-NEXT:    ret
; V8-NEXT:    restore %g0, 10, %o0
;
; V9-LABEL: clobber_cc:
; V9:       ! %bb.0:
; V9-NEXT:    save %sp, -128, %sp
; V9-NEXT:    !APP
; V9-NEXT:    cmp %g0, 1
; V9-NEXT:    !NO_APP
; V9-NEXT:    mov 20, %i2
; V9-NEXT:    cmp %i0, %i1
; V9-NEXT:    movcs %icc, 10, %i2
; V9-NEXT:    ret
; V9-NEXT:    restore %g0, %i2, %o0
  %c = icmp ult i32 %a, %b
  call void asm sideeffect "cmp %g0, 1", "~{cc}"()
  %r = select i1 %c, i32 10, i32 20
  ret i32 %r
}

define i32 @clobber_icc(i32 %a, i32 %b) nounwind {
; V8-LABEL: clobber_icc:
; V8:       ! %bb.0:
; V8-NEXT:    save %sp, -96, %sp
; V8-NEXT:    !APP
; V8-NEXT:    cmp %g0, 1
; V8-NEXT:    !NO_APP
; V8-NEXT:    cmp %i0, %i1
; V8-NEXT:    bcs .LBB1_2
; V8-NEXT:    nop
; V8-NEXT:  ! %bb.1:
; V8-NEXT:    ret
; V8-NEXT:    restore %g0, 20, %o0
; V8-NEXT:  .LBB1_2:
; V8-NEXT:    ret
; V8-NEXT:    restore %g0, 10, %o0
;
; V9-LABEL: clobber_icc:
; V9:       ! %bb.0:
; V9-NEXT:    save %sp, -128, %sp
; V9-NEXT:    !APP
; V9-NEXT:    cmp %g0, 1
; V9-NEXT:    !NO_APP
; V9-NEXT:    mov 20, %i2
; V9-NEXT:    cmp %i0, %i1
; V9-NEXT:    movcs %icc, 10, %i2
; V9-NEXT:    ret
; V9-NEXT:    restore %g0, %i2, %o0
  %c = icmp ult i32 %a, %b
  call void asm sideeffect "cmp %g0, 1", "~{icc}"()
  %r = select i1 %c, i32 10, i32 20
  ret i32 %r
}

define float @clobber_fcc0(float %a, float %b) nounwind {
; V8-LABEL: clobber_fcc0:
; V8:       ! %bb.0:
; V8-NEXT:    save %sp, -104, %sp
; V8-NEXT:    st %i1, [%fp+-4]
; V8-NEXT:    st %i0, [%fp+-8]
; V8-NEXT:    ld [%fp+-4], %f1
; V8-NEXT:    ld [%fp+-8], %f0
; V8-NEXT:    !APP
; V8-NEXT:    fcmps %f0, %f0
; V8-NEXT:    !NO_APP
; V8-NEXT:    fcmps %f0, %f1
; V8-NEXT:    nop
; V8-NEXT:    fbl .LBB2_2
; V8-NEXT:    nop
; V8-NEXT:  ! %bb.1:
; V8-NEXT:    fmovs %f1, %f0
; V8-NEXT:  .LBB2_2:
; V8-NEXT:    ret
; V8-NEXT:    restore
;
; V9-LABEL: clobber_fcc0:
; V9:       ! %bb.0:
; V9-NEXT:    save %sp, -128, %sp
; V9-NEXT:    fmovs %f3, %f0
; V9-NEXT:    !APP
; V9-NEXT:    fcmps %f0, %f0
; V9-NEXT:    !NO_APP
; V9-NEXT:    fcmps %fcc0, %f1, %f3
; V9-NEXT:    fmovsl %fcc0, %f1, %f0
; V9-NEXT:    ret
; V9-NEXT:    restore
  %c = fcmp olt float %a, %b
  call void asm sideeffect "fcmps %f0, %f0", "~{fcc0}"()
  %r = select i1 %c, float %a, float %b
  ret float %r
}